Claude review: drm/xe/xe_hw_error: Add support for Core-Compute errors

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

**Platform guard broadened without full coverage:**
```c
-	if (xe->info.platform != XE_BATTLEMAGE)
+	if (!IS_DGFX(xe))
 		return;
```

This now enters `hw_error_source_handler` for all discrete GPUs, but `hw_error_info_init` only initializes RAS for PVC. For Battlemage (and future DGFX), `info` will be NULL. The `if (!info) goto clear_reg` guard prevents a crash, but it also means **Battlemage silently stops processing error bits other than CSC** — a regression from the current code that does process them (even if just clearing the register). Consider whether this behavioral change is intentional.

**`xe_hw_error_map` array size issue with `break` vs `continue`:**
```c
+	for_each_set_bit(err_bit, &err_src, XE_RAS_REG_SIZE) {
+		/* Check error bit is within bounds */
+		if (err_bit >= ARRAY_SIZE(xe_hw_error_map))
+			break;
```

In this patch, `xe_hw_error_map` has only index `[0]`, so `ARRAY_SIZE` is 1. The `break` exits the entire loop when any bit > 0 is set. This means if bit 0 (GT) and bit 17 (CSC) are both set in the same status register read, CSC would be silently skipped. Using `continue` instead of `break` would be safer, though CSC is handled separately above. In patch 5 the array grows to size 17, but bits 1-15 would still exit the loop prematurely due to `break`.

**Potential double-counting in subslice error path:**
```c
+		case ERR_STAT_GT_VECTOR0:
+		case ERR_STAT_GT_VECTOR1: {
+			val = hweight32(vector);
+			atomic_add(val, &info[error_id].counter);
+			...
+			err_stat = xe_mmio_read32(mmio, ERR_STAT_GT_REG(hw_err));
+			for_each_set_bit(errbit, &err_stat, GT_HW_ERROR_MAX_ERR_BITS) {
+				if (PVC_ERROR_MASK_SET(hw_err, errbit))
+					atomic_inc(&info[error_id].counter);
+			}
```

The vector register bits and the error status register bits both increment the same counter. If these represent the same underlying errors reported through two different registers, this double-counts. Please clarify in comments whether these are truly independent error events.

**`PVC_ERROR_MASK_SET` macro missing parentheses around `hw_err`:**
```c
+#define PVC_ERROR_MASK_SET(hw_err, err_bit)	((hw_err == HARDWARE_ERROR_CORRECTABLE) ? \
```
Should be `((hw_err) == HARDWARE_ERROR_CORRECTABLE)` to prevent operator-precedence issues if a complex expression is passed.

Same issue in `PVC_GT_VECTOR_LEN`, `ERR_STAT_GT_VECTOR_REG`, and other macros using unparenthesized parameters.

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Generated by Claude Code Patch Reviewer