From mboxrd@z Thu Jan  1 00:00:00 1970
From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: arm64: dts: qcom: sc8280xp: Add dsi nodes on SC8280XP
Date: Tue, 03 Mar 2026 14:16:44 +1000
Message-ID: <review-patch4-20260228141715.35307-5-mitltlatltl@gmail.com>
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Patch Review

**Status: Has bugs that need fixing.**

This is the main DTS patch adding 4 DSI controllers and 4 DSI PHYs across both MDSS instances. Overall structure looks correct, but there are two issues:

#### Bug 1: Missing comma in PHY compatible strings (CRITICAL)

All four PHY nodes are missing a comma between the two compatible strings. This will cause a DTS compilation error.

For `mdss0_dsi0_phy`:
```dts
+			compatible = "qcom,sc8280xp-dsi-phy-5nm"
+				     "qcom,sa8775p-dsi-phy-5nm";
```

Should be:
```dts
+			compatible = "qcom,sc8280xp-dsi-phy-5nm",
+				     "qcom,sa8775p-dsi-phy-5nm";
```

This same missing comma is present in all four PHY nodes: `mdss0_dsi0_phy`, `mdss0_dsi1_phy`, `mdss1_dsi0_phy`, and `mdss1_dsi1_phy`.

#### Bug 2: Copy-paste error in mdss1_dsi0 assigned-clock-parents

For `mdss1_dsi0`, the byte clock parent references the wrong PHY:

```dts
+			assigned-clock-parents = <&mdss1_dsi1_phy DSI_BYTE_PLL_CLK>,
+						 <&mdss1_dsi0_phy DSI_PIXEL_PLL_CLK>;
```

The byte clock parent should reference `&mdss1_dsi0_phy` (not `&mdss1_dsi1_phy`), matching the pattern in `mdss0_dsi0` where both clock parents come from the same PHY:

```dts
			assigned-clock-parents = <&mdss0_dsi0_phy DSI_BYTE_PLL_CLK>,
						 <&mdss0_dsi0_phy DSI_PIXEL_PLL_CLK>;
```

This is likely a copy-paste error from the mdss1_dsi1 block.

#### Minor observations (not blocking)

- The `dsi_opp_table` is defined inside `mdss0_dsi0` and shared by reference from all four DSI controllers. This is correct per v2 review feedback from Konrad.
- The `#include <dt-bindings/clock/qcom,dsi-phy-28nm.h>` header provides the `DSI_BYTE_PLL_CLK` and `DSI_PIXEL_PLL_CLK` defines. Despite the "28nm" in the filename, these constants are generic and used across PHY generations.
- The `refgen-supply` is correctly present on all four DSI controllers, addressing v3 feedback from Dmitry.
- The whitespace-only changes (adding blank lines between `reg` and endpoint labels) in existing port nodes are valid style cleanups.
- The commit message honestly notes that DSI won't fully work yet due to pending dispcc fixes and DSC timing issues. This is good transparency.

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