Claude review: drm/rockchip: analogix_dp: Add support for RK3576

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

**hclk lifetime concern.** The `hclk` is acquired with `devm_clk_get_optional_enabled()`:

```c
+	dp->hclk = devm_clk_get_optional_enabled(dev, "hclk");
```

This means the clock is enabled at probe time and stays enabled for the entire lifetime of the device (until driver removal). The commit message says "which must be enabled during probing for RK3576 eDP controller," but keeping it permanently enabled may waste power. Consider whether it should instead be enabled/disabled alongside `pclk` in `rockchip_dp_poweron()`/`rockchip_dp_powerdown()`. If it truly needs to be always-on, a comment explaining why would be helpful.

That said, `devm_clk_get_optional_enabled` is a valid pattern used elsewhere in the kernel, and if the clock must be on whenever the device is bound (e.g., for register access), this is correct.

**Missing `edp_mode` GRF field.** The RK3576 chip_data has no `edp_mode` field set:

```c
+static const struct rockchip_dp_chip_data rk3576_edp[] = {
+	{
+		.chip_type = RK3576_EDP,
+		.reg = 0x27dc0000,
+	},
+	{ /* sentinel */ }
+};
```

Compare with RK3588 which has:
```c
	.edp_mode = GRF_REG_FIELD(0x0000, 0, 0),
```

The `edp_mode` field is used in `rockchip_dp_poweron()` and `rockchip_dp_powerdown()` via `rockchip_grf_field_write()`. Since the field's `.valid` will be `false` (zero-initialized), `rockchip_grf_field_write()` will return 0 early — so this is functionally safe. But the commit message should clarify whether RK3576 genuinely has no GRF edp_mode bit, or if this is an oversight.

**No `lcdc_sel` either** — this is used in `rockchip_dp_drm_encoder_enable()`. Again, `rockchip_grf_field_write()` will silently no-op due to `.valid = false`. This is consistent with RK3588 which also has no `lcdc_sel`, so this appears intentional.

No blocking issues, but the hclk lifecycle and missing `edp_mode` documentation could use clarification.

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