From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/tyr: Use register! macro for MMU_CONTROL Date: Fri, 13 Mar 2026 14:38:51 +1000 Message-ID: In-Reply-To: <20260311-b4-tyr-use-register-macro-v2-v2-4-b936d9eb8f51@collabora.com> References: <20260311-b4-tyr-use-register-macro-v2-v2-0-b936d9eb8f51@collabora.com> <20260311-b4-tyr-use-register-macro-v2-v2-4-b936d9eb8f51@collabora.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review Clean conversion of MMU IRQ registers. The field split into `page_fault` (b= its 15:0) and `command_completed` (bits 31:16) matches the hardware's per-a= ddress-space layout (16 address spaces). **Naming inconsistency:** The GPU and JOB control modules use prefixed name= s (`GPU_IRQ_RAWSTAT`, `JOB_IRQ_RAWSTAT`) but MMU control uses unprefixed na= mes (`IRQ_RAWSTAT`, `IRQ_CLEAR`, etc.). This inconsistency could cause conf= usion. If `mmu_control::*` is ever glob-imported alongside `gpu_control::*`= , the names `IRQ_RAWSTAT` etc. would shadow or conflict. Consider using `MM= U_IRQ_RAWSTAT` etc. for consistency with the other register pages. **Same re-export issue as patch 3** =E2=80=94 no `pub(super) use mmu_contro= l::*;` added. --- Generated by Claude Code Patch Reviewer