From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm: renesas: rzg2l_mipi_dsi: Increase reset deassertion delay to 1 msec Date: Sun, 22 Mar 2026 04:12:40 +1000 Message-ID: In-Reply-To: <20260319164833.409126-5-biju.das.jz@bp.renesas.com> References: <20260319164833.409126-1-biju.das.jz@bp.renesas.com> <20260319164833.409126-5-biju.das.jz@bp.renesas.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review Changes the delay after CMN_RSTB deassert from `udelay(1)` (1 usec) to `fsl= eep(1000)` (1 msec), matching the hardware manual's >=3D 1 msec requirement. ```c - udelay(1); + fsleep(1000); ``` This is a clear fix =E2=80=94 `udelay(1)` is 1 microsecond, three orders of= magnitude less than the required 1 millisecond. Using `fsleep()` is the co= rrect API choice here: for a 1ms delay, `fsleep` will use `usleep_range()` = internally, which is appropriate for non-atomic context (this runs from `at= omic_pre_enable` bridge callback, which is a process context despite the "a= tomic" name). **Missing Fixes tag:** This patch fixes a real hardware timing violation (1= usec vs required 1 msec) and could reasonably carry a `Fixes:` tag pointin= g to the original commit that introduced the `udelay(1)`. If the driver has= been working despite this, it may be that the hardware is tolerant, but it= 's still out of spec. --- Generated by Claude Code Patch Reviewer