Claude review: drm/panthor: Store IRQ register base iomem pointer in panthor_irq

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

**Issues found:**

1. **Bisection break**: The `panthor_pwr.c` change introduces a reference to `GPU_CONTROL_BASE`:
   ```c
   err = panthor_request_pwr_irq(ptdev, &pwr->irq, irq,
                                 PWR_INTERRUPTS_MASK,
                                 GPU_CONTROL_BASE + PWR_CONTROL_BASE);
   ```
   But `GPU_CONTROL_BASE` is not defined until patch 5 (`panthor_gpu_regs.h`). This will break compilation at this commit.

   Fix: either define `GPU_CONTROL_BASE` earlier (in `panthor_hw_regs.h` or `panthor_gpu_regs.h` in patch 2), or use the literal `0x0 +` or just `PWR_CONTROL_BASE` here since `GPU_CONTROL_BASE` is 0.

2. **Generic INT_* defines in `panthor_device.h`**: The new defines:
   ```c
   #define INT_RAWSTAT 0x0
   #define INT_CLEAR   0x4
   #define INT_MASK    0x8
   #define INT_STAT    0xc
   ```
   These are very generic names that could collide with other headers. Consider prefixing them (e.g., `PANTHOR_INT_RAWSTAT`) or scoping them more tightly. In a large kernel tree, short generic macro names are a collision risk.

The core design -- storing `void __iomem *iomem` in `struct panthor_irq` and using generic offsets -- is a good approach. Removing the `__reg_prefix` template parameter from the `PANTHOR_IRQ_HANDLER` macro simplifies the instantiation sites.

---
Generated by Claude Code Patch Reviewer