From mboxrd@z Thu Jan  1 00:00:00 1970
From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: drm/hibmc: Use gem-shmem with shadow-plane helpers for memory management
Date: Thu, 23 Apr 2026 10:03:23 +1000
Message-ID: <review-patch4-20260420121130.200133-5-tzimmermann@suse.de>
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References: <20260420121130.200133-1-tzimmermann@suse.de> <20260420121130.200133-5-tzimmermann@suse.de>
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Patch Review

**Status: Good**

This is the core conversion. The approach closely follows ast and mgag200, =
which gives confidence it's well-proven.

**Core API change =E2=80=94 exporting `drm_gem_shmem_create_with_handle()`*=
*: This was previously static in `drm_gem_shmem_helper.c`. The export is ne=
eded because hibmc needs custom pitch alignment (128 bytes) in `dumb_create=
`, so it can't use the standard `drm_gem_shmem_dumb_create()`. Good documen=
tation is added. The function is also declared in the header. Clean.

**VRAM management**: The old `drmm_vram_helper_init()` + TTM is replaced wi=
th a simple `devm_ioremap_wc()`:
```c
priv->vram =3D devm_ioremap_wc(dev->dev, vram_base, vram_size);
```
Write-combining is the correct mapping for VRAM that will be written by CPU=
 memcpy.

**Shadow plane damage handling** in `atomic_update`:
```c
if (drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE) =3D=3D 0) {
    drm_atomic_helper_damage_iter_init(&iter, old_state, new_state);
    drm_atomic_for_each_plane_damage(&iter, &damage) {
        struct iosys_map dst[DRM_FORMAT_MAX_PLANES] =3D {
            IOSYS_MAP_INIT_VADDR_IOMEM(priv->vram + gpu_addr),
        };
        iosys_map_incr(&dst[0],
                       drm_fb_clip_offset(fb->pitches[0], fb->format, &dama=
ge));
        drm_fb_memcpy(dst, fb->pitches, shadow_plane_state->data, fb, &dama=
ge);
    }
    drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE);
}
```

This follows the ast pattern exactly. The `drm_gem_fb_begin_cpu_access()` /=
 `end_cpu_access()` bracket properly synchronizes dma-buf shared buffers. I=
f `begin_cpu_access` fails, the function silently skips the copy but still =
programs the hardware registers =E2=80=94 this is acceptable since `atomic_=
update` can't return errors.

**`gpu_addr` is hardcoded to 0**: Since there's no VRAM allocator anymore, =
all framebuffers are copied to VRAM offset 0. This means no double-bufferin=
g in VRAM, so page flips will show tearing during the copy. This is the sam=
e tradeoff made by ast/mgag200 and is acceptable for a server BMC display c=
ard. Damage clipping (`drm_plane_enable_fb_damage_clips`) minimizes the cop=
y window.

**Mode validation**:
```c
const struct drm_format_info *info =3D
    drm_get_format_info(dev, DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_LINEAR);
```
Using XRGB8888 (the largest format at 4 bpp) gives a conservative check ens=
uring any supported format will fit. The overflow-safe division `pitch > ma=
x_fb_size / mode->vdisplay` is the correct approach.

**Kconfig changes**: Drops `DRM_VRAM_HELPER`, `DRM_TTM`, `DRM_TTM_HELPER`, =
adds `DRM_GEM_SHMEM_HELPER`. Clean.

No issues found.

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