From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: arm64: dts: qcom: milos-fairphone-fp6: Enable display Date: Tue, 05 May 2026 09:22:46 +1000 Message-ID: In-Reply-To: <20260501-fp6-panel-v1-4-e09cb05651cc@fairphone.com> References: <20260501-fp6-panel-v1-0-e09cb05651cc@fairphone.com> <20260501-fp6-panel-v1-4-e09cb05651cc@fairphone.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review The DTS changes look correct. The panel node matches the binding definition. A couple of observations: **pinctrl-0/pinctrl-1 on the panel node:** ```dts pinctrl-0 = <&disp_reset_n_active>, <&mdp_vsync>; pinctrl-1 = <&disp_reset_n_suspend>, <&mdp_vsync>; pinctrl-names = "default", "sleep"; ``` The pinctrl states reference `disp_reset_n_active`/`disp_reset_n_suspend` for the reset GPIO. Since the driver already manages the reset GPIO via `gpiod_set_value_cansleep`, the pinctrl is providing the electrical characteristics (drive-strength, bias), which is correct. The `mdp_vsync` pin is the same in both states, which is fine. The DT structure looks reasonable -- MDSS, DSI, DSI PHY are all enabled with the correct supply references. The `data-lanes = <0 1 2 3>` on the DSI output matches the 4-lane configuration in the driver (`dsi->lanes = 4`). No issues with this patch. --- Generated by Claude Code Patch Reviewer