From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: media: iris: don't specify ubwc_swizzle in the source code Date: Thu, 07 May 2026 12:40:17 +1000 Message-ID: In-Reply-To: <20260507-iris-ubwc-v5-4-e9a3aee53c49@oss.qualcomm.com> References: <20260507-iris-ubwc-v5-0-e9a3aee53c49@oss.qualcomm.com> <20260507-iris-ubwc-v5-4-e9a3aee53c49@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review Replaces three separate `bank_swzl_level` / `bank_swz2_level` / `bank_swz3_= level` fields (each `u32`, values 0 or 1) with bitmask checks: ```c payload =3D !!(qcom_ubwc_swizzle(ubwc) & UBWC_SWIZZLE_ENABLE_LVL1); payload =3D !!(qcom_ubwc_swizzle(ubwc) & UBWC_SWIZZLE_ENABLE_LVL2); payload =3D !!(qcom_ubwc_swizzle(ubwc) & UBWC_SWIZZLE_ENABLE_LVL3); ``` Verified against the SM8550 original values (`bank_swzl_level=3D0`, `bank_s= wz2_level=3D1`, `bank_swz3_level=3D1`): - `UBWC_SWIZZLE_ENABLE_LVL1` =3D `BIT(0)` -- UBWC 2.0+ disables level 1 =E2= =86=92 0. Correct. - `UBWC_SWIZZLE_ENABLE_LVL2` =3D `BIT(1)` -- enabled =E2=86=92 1. Correct. - `UBWC_SWIZZLE_ENABLE_LVL3` =3D `BIT(2)` -- enabled =E2=86=92 1. Correct. The `!!` double-negation normalizes to 0/1, matching the original semantics. No issues. --- Generated by Claude Code Patch Reviewer