From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: arm64: dts: qcom: kaanapali: Add qfprom node Date: Sat, 16 May 2026 14:35:13 +1000 Message-ID: In-Reply-To: <20260512-kaana-gpu-dt-v1-4-13e1c07c2050@oss.qualcomm.com> References: <20260512-kaana-gpu-dt-v1-0-13e1c07c2050@oss.qualcomm.com> <20260512-kaana-gpu-dt-v1-4-13e1c07c2050@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review **Status: Looks good** Adds a qfprom/efuse node at `0x221c8000` with a `gpu-speed-bin` child for reading the GPU speed bin fuse. The node uses the conventional `efuse@` node name and the standard `"qcom,kaanapali-qfprom", "qcom,qfprom"` compatible pair. ``` + efuse@221c8000 { + compatible = "qcom,kaanapali-qfprom", "qcom,qfprom"; + reg = <0x0 0x221c8000 0x0 0x1000>; + ... + gpu_speed_bin: gpu-speed-bin@142 { + reg = <0x142 0x2>; + bits = <3 9>; + }; ``` The speed bin is a 9-bit field starting at bit 3 of offset `0x142`. This is referenced by the GPU node in patch 5 via `nvmem-cells = <&gpu_speed_bin>`. The node is placed before `nsp_noc@260c0000`, maintaining correct address order. --- --- Generated by Claude Code Patch Reviewer