From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: arm64: dts: qcom: glymur: Add GPU smmu node Date: Sat, 16 May 2026 12:51:47 +1000 Message-ID: In-Reply-To: <20260513-glymur-gpu-dt-v4-4-f83832c3bc9a@oss.qualcomm.com> References: <20260513-glymur-gpu-dt-v4-0-f83832c3bc9a@oss.qualcomm.com> <20260513-glymur-gpu-dt-v4-4-f83832c3bc9a@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review Adds the `adreno_smmu` iommu node at `0x03da0000` with: - 1 global interrupt + 25 context bank interrupts (26 total) - Single `hlos` clock from gpucc - CX power domain - `dma-coherent` property This follows the SM8750 GPU SMMU pattern. The node is placed at the correct address-sorted position (after gpucc at `0x03d90000`, before ipcc at `0x03e04000`). Has Reviewed-by tags from Konrad and Dmitry. No issues. --- Generated by Claude Code Patch Reviewer