From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: arm64: dts: rockchip: rk3568-rock-3b: Enable NPU Date: Thu, 04 Jun 2026 16:18:12 +1000 Message-ID: In-Reply-To: <20260529155824.3099831-5-midgy971@gmail.com> References: <26069b3b-43c0-45fa-92ee-729d270a8b6b@kernel.org> <20260529155824.3099831-5-midgy971@gmail.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review This patch is clean and minimal: ```dts &rknn_core_0 { npu-supply = <&vdd_npu>; status = "okay"; }; &rknn_mmu_0 { status = "okay"; }; ``` No issues. The `vdd_npu` regulator is referenced from the existing board file. The pattern of enabling both the NPU core and its IOMMU is correct. --- **Summary of must-fix items:** 1. **Patch 2**: Fix the missing `$ref` in the `rockchip,pmu` property definition 2. **Patch 1**: Check `clk_set_rate()` return values in `rk3568_noc_init()` 3. **Patch 1**: Fix the incomplete error cleanup path after `noc_init` failure 4. **Patch 3**: Move NPU nodes to the correct address-sorted position **Items worth discussing:** - Runtime PM / system suspend re-initialization of the NOC bus - Whether `rockchip,pmu` should be conditionally required in the binding - The fragility of the two-step PVTPLL workaround --- Generated by Claude Code Patch Reviewer