From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: drm/tyr: add MMU address space registers
Date: Tue, 03 Mar 2026 12:48:19 +1000 [thread overview]
Message-ID: <review-patch5-20260302232500.244489-6-deborah.brouwer@collabora.com> (raw)
In-Reply-To: <20260302232500.244489-6-deborah.brouwer@collabora.com>
Patch Review
**Author:** Daniel Almeida
Adds register definitions and an `AsRegister` helper for per-address-space register access.
One concern: `AsRegister::new()` does not validate `as_nr`:
```rust
+impl AsRegister {
+ fn new(as_nr: usize, offset: usize) -> Result<Self> {
+ Ok(AsRegister(mmu_as(as_nr) + offset))
+ }
```
It returns `Result` but never returns an error. If `as_nr >= MAX_AS_REGISTERS`, the computed offset will be out of the expected MMIO range. While callers in the address_space module do call `validate_as_slot()` before using these registers, the validation is in `AsRegister::new` is misleading since it always succeeds. Consider either adding a bounds check here or changing the return type to plain `AsRegister` (not `Result`). Given the `try_read32`/`try_write32` calls in read/write will catch truly out-of-bounds accesses at the IoMem level, this is a defense-in-depth concern rather than a functional bug.
Minor nit: `AS_MEMATTR_AARCH64_SH_MIDGARD_INNER` is `0 << 4` which is just `0`. A comment noting this is intentional (the zero value selects "midgard inner" shareability) would improve readability.
The change from `MAX_AS_REGISTERS = 32` to `16` matches the Mali CSF spec — good fix.
---
Generated by Claude Code Patch Reviewer
next prev parent reply other threads:[~2026-03-03 2:48 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-02 23:24 [PATCH v2 0/12] drm/tyr: firmware loading and MCU boot support Deborah Brouwer
2026-03-02 23:24 ` [PATCH v2 01/12] drm/tyr: select DRM abstractions in Kconfig Deborah Brouwer
2026-03-03 2:48 ` Claude review: " Claude Code Review Bot
2026-03-02 23:24 ` [PATCH v2 02/12] drm/tyr: move clock cleanup into Clocks Drop impl Deborah Brouwer
2026-03-03 2:48 ` Claude review: " Claude Code Review Bot
2026-03-02 23:24 ` [PATCH v2 03/12] drm/tyr: rename TyrObject to BoData Deborah Brouwer
2026-03-03 2:48 ` Claude review: " Claude Code Review Bot
2026-03-02 23:24 ` [PATCH v2 04/12] drm/tyr: set DMA mask using GPU physical address Deborah Brouwer
2026-03-03 2:48 ` Claude review: " Claude Code Review Bot
2026-03-02 23:24 ` [PATCH v2 05/12] drm/tyr: add MMU address space registers Deborah Brouwer
2026-03-03 2:48 ` Claude Code Review Bot [this message]
2026-03-02 23:24 ` [PATCH v2 06/12] drm/tyr: add shmem backing for GEM objects Deborah Brouwer
2026-03-03 2:48 ` Claude review: " Claude Code Review Bot
2026-03-02 23:24 ` [PATCH v2 07/12] drm/tyr: Add generic slot manager Deborah Brouwer
2026-03-03 2:48 ` Claude review: " Claude Code Review Bot
2026-03-02 23:24 ` [PATCH v2 08/12] drm/tyr: add MMU module Deborah Brouwer
2026-03-03 2:48 ` Claude review: " Claude Code Review Bot
2026-03-02 23:24 ` [PATCH v2 09/12] drm/tyr: add GPU virtual memory module Deborah Brouwer
2026-03-03 2:48 ` Claude review: " Claude Code Review Bot
2026-03-02 23:24 ` [PATCH v2 10/12] drm/tyr: add a kernel buffer object Deborah Brouwer
2026-03-03 2:48 ` Claude review: " Claude Code Review Bot
2026-03-02 23:24 ` [PATCH v2 11/12] drm/tyr: add parser for firmware binary Deborah Brouwer
2026-03-03 2:48 ` Claude review: " Claude Code Review Bot
2026-03-02 23:25 ` [PATCH v2 12/12] drm/tyr: add firmware loading and MCU boot support Deborah Brouwer
2026-03-03 2:48 ` Claude review: " Claude Code Review Bot
2026-03-03 2:48 ` Claude review: drm/tyr: " Claude Code Review Bot
-- strict thread matches above, loose matches on Subject: below --
2026-03-24 0:18 [PATCH v3 00/12] drm/tyr: Use register! macro Deborah Brouwer
2026-03-24 0:18 ` [PATCH v3 07/12] drm/tyr: Add MMU address space registers Deborah Brouwer
2026-03-24 21:08 ` Claude review: " Claude Code Review Bot
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