From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/msm/a8xx: use pipe protect slot 15 for last-span-unbound feature Date: Sun, 12 Apr 2026 13:17:01 +1000 Message-ID: In-Reply-To: <20260407-adreno-810-v3-5-30cb7f196ed4@pm.me> References: <20260407-adreno-810-v3-0-30cb7f196ed4@pm.me> <20260407-adreno-810-v3-5-30cb7f196ed4@pm.me> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review This patch hardcodes pipe protect slot 15 for the last-span-unbound feature: ```c - a8xx_write_pipe(gpu, PIPE_BR, REG_A8XX_CP_PROTECT_PIPE(protect->count_max= ), final_cfg); - a8xx_write_pipe(gpu, PIPE_BV, REG_A8XX_CP_PROTECT_PIPE(protect->count_max= ), final_cfg); + a8xx_write_pipe(gpu, PIPE_BR, REG_A8XX_CP_PROTECT_PIPE(15), final_cfg); + a8xx_write_pipe(gpu, PIPE_BV, REG_A8XX_CP_PROTECT_PIPE(15), final_cfg); ``` This is necessary because A8xx GPUs have 16 pipe protect slots (0-15) and 6= 4 global protect slots. The existing x285 and a840 entries have `count_max = =3D 15`, which coincidentally matched the last pipe slot. But A810 needs `c= ount_max =3D 64` (its actual global slot count), which would cause an out-o= f-bounds pipe slot access without this fix. The commit message correctly explains this matches downstream behavior. Alr= eady has Reviewed-by from Konrad Dybcio and Akhil P Oommen. **Suggestion:** Since `count_max` is no longer used for the pipe slot, cons= ider also updating x285 and a840 to `count_max =3D 64` for consistency, and= adding them to `__build_asserts`. Currently x285 has 52 global entries and= a840 has 54, both with `count_max =3D 15` =E2=80=94 which would fail BUILD= _BUG_ON if added to asserts. This isn't introduced by this series, but it's= a good opportunity to clean it up. --- Generated by Claude Code Patch Reviewer