From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/panthor: Use a local iomem base for PWR registers Date: Tue, 28 Apr 2026 14:28:33 +1000 Message-ID: In-Reply-To: <20260427155934.416502-7-karunika.choo@arm.com> References: <20260427155934.416502-1-karunika.choo@arm.com> <20260427155934.416502-7-karunika.choo@arm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review Adds `pwr->iomem = ptdev->iomem + PWR_CONTROL_BASE`. Converts all PWR register accesses. The `PWR_CTRL_REG()` macro is removed and all PWR register offsets become relative to the block base. **Minor**: The commit message has a typo: "PWR_CONTROl-local" (lowercase 'l' in CONTROL). **Note**: This patch is missing Reviewed-by/Acked-by tags (only has Signed-off-by), presumably because it was significantly reworked in v3. **Pre-existing issue** (not introduced by this series): In `panthor_pwr_l2_power_on()`: ```c const u32 pwr_status = gpu_read64(pwr->iomem, PWR_STATUS); const u32 l2_allow_mask = PWR_STATUS_DOMAIN_ALLOWED(PWR_COMMAND_DOMAIN_L2); ``` Both are `u32` but `PWR_STATUS` is a 64-bit register and `PWR_STATUS_DOMAIN_ALLOWED()` uses `BIT_U64()`. The truncation happens to be harmless for the L2 domain (bit 0), but should probably be `u64` for correctness. Not something this series needs to fix, but worth noting. --- Generated by Claude Code Patch Reviewer