From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/msm/hdmi_hdcp: Simplify register bit updates Date: Thu, 12 Mar 2026 06:45:27 +1000 Message-ID: In-Reply-To: <20260311-drm-msm-hdmi-cleanup-v1-7-c5535245f6de@oss.qualcomm.com> References: <20260311-drm-msm-hdmi-cleanup-v1-0-c5535245f6de@oss.qualcomm.com> <20260311-drm-msm-hdmi-cleanup-v1-7-c5535245f6de@oss.qualcomm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review Continues the same pattern from patch 6, applying `hdmi_clear_bits()` and `= hdmi_update_bits()` to `hdmi_hdcp.c`. All conversions are straightforward a= nd correct. Same typo in the commit message: "reister" =E2=86=92 "register." **Thread safety note**: The HDCP code uses these helpers within `spin_lock_= irqsave`/`spin_unlock_irqrestore` regions (e.g., around `REG_HDMI_CTRL` and= `REG_HDMI_HPD_CTRL` accesses). The helpers perform read-modify-write via `= readl`/`writel`, which is safe under the existing spinlock. The refactoring= preserves the locking boundaries correctly. No functional issues. --- Generated by Claude Code Patch Reviewer