From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: arm64: dts: qcom: milos: Add Adreno 810 GPU and GMU nodes Date: Sun, 12 Apr 2026 13:17:02 +1000 Message-ID: In-Reply-To: <20260407-adreno-810-v3-7-30cb7f196ed4@pm.me> References: <20260407-adreno-810-v3-0-30cb7f196ed4@pm.me> <20260407-adreno-810-v3-7-30cb7f196ed4@pm.me> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review DTS addition for the Milos SoC. A few observations: **GPU node:** Three reg regions (kgsl_3d0_reg_memory, cx_mem, cx_dbgc) with= standard names. The OPP table ranges from 264MHz to 1050MHz, matching the = cover letter's note about GPU_CC_FREQ_LIMIT_VAL limiting to 1050MHz. **GMU node:** Uses `qcom,adreno-gmu-810.0` compatible with 6 clocks matchin= g the binding from patch 1. Power domains include both CX (from gpucc) and = GX (from gxclkctl using the kaanapali header, explained in the commit messa= ge as having identical definitions). **GPU OPP table:** - Uses `qcom,opp-acd-level` properties for ACD (Adaptive Clock Distribution= ). - Has `operating-points-v2-adreno` compatible. - 9 OPP entries spanning LOW_SVS_D1 through TURBO_L1. **Status:** `status =3D "disabled"` on the GPU node is correct =E2=80=94 it= should be enabled per-board. Already has Reviewed-by from Konrad Dybcio and Dmitry Baryshkov. The DTS lo= oks reasonable and complete. --- Generated by Claude Code Patch Reviewer