From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/rockchip: dw_dp: Implement out-of-band HPD handling Date: Tue, 05 May 2026 09:49:47 +1000 Message-ID: In-Reply-To: <20260501-synopsys-dw-dp-improvements-v2-7-d7e7f6bac77f@collabora.com> References: <20260501-synopsys-dw-dp-improvements-v2-0-d7e7f6bac77f@collabora.com> <20260501-synopsys-dw-dp-improvements-v2-7-d7e7f6bac77f@collabora.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review This is the largest patch in the series and significantly reworks `dw_dp-ro= ckchip.c`. **Issue =E2=80=94 hardcoded IO addresses for controller identification:** ```c +static const struct rockchip_dw_dp_plat_data rk3588_dp_plat_data =3D { + .ctrl_ids =3D {0xfde50000, 0xfde60000}, ``` The controller ID is determined by matching the platform resource start add= ress against hardcoded values. This works but is fragile =E2=80=94 it shoul= d ideally come from the DT (e.g., a `reg` index or an explicit property). T= his pattern appears in some other Rockchip drivers but is generally conside= red suboptimal. **Issue =E2=80=94 `dp_dp_rockchip_get_vo_grf()` is a workaround:** ```c + /* + * Limit this workaround to RK3576 and RK3588, new platforms should + * add a VO GRF phandle in the DisplayPort DT node. + */ ``` The code navigates from the DP node =E2=86=92 PHY phandle =E2=86=92 PHY's `= rockchip,vo-grf` to find the VO GRF. The comment acknowledges this is a wor= karound. This is acceptable for existing DTs but the DT binding should be u= pdated to add a direct `rockchip,vo-grf` property for future platforms. **Minor =E2=80=94 `#include `:** This is a relatively = new header. The `FIELD_PREP_WM16_CONST` usage is correct for Rockchip's wri= te-masked GRF registers. --- Generated by Claude Code Patch Reviewer