From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: arm64: dts: qcom: milos: Add Adreno 810 GPU and GMU nodes Date: Sat, 16 May 2026 10:05:42 +1000 Message-ID: In-Reply-To: <20260515-adreno-810-v6-7-fbe04c7203e1@pm.me> References: <20260515-adreno-810-v6-0-fbe04c7203e1@pm.me> <20260515-adreno-810-v6-7-fbe04c7203e1@pm.me> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review **Status: Looks good, standard DTS enablement** Adds GPU and GMU nodes for Milos. Notable aspects: - **Register regions**: GPU at `0x03d00000` (0x6c000), cx_mem at `0x03d9e00= 0` (0x2000), GMU at `0x03d6c000` (0x32000) =E2=80=94 these are contiguous (= GPU ends where GMU starts, GMU ends where cx_mem starts) - **OPP table**: 10 operating points from 264MHz to 1150MHz. Highest OPP (1= 150MHz) has `opp-supported-hw =3D <0x3>` limiting it to speedbins 0 and 1, = while other OPPs have `<0x7>` (all 3 bins). Consistent with 3 speedbin entr= ies in patch 6 - **GMU OPPs**: Two levels (350MHz low SVS, 650MHz SVS) - **Power domains**: CX from gpucc, GX from gxclkctl with `GX_CLKCTL_GX_GDS= C` - **Header reuse**: `qcom,kaanapali-gxclkctl.h` is documented as reusable b= ecause Milos uses the same driver with identical `GX_CLKCTL_GX_GDSC` defini= tion - **No LLCC**: No `llcc` property present, confirming the motivation for pa= tch 4 - **Status disabled**: Correctly starts disabled, to be enabled per-board The `qcom,opp-acd-level` values are present on all OPPs for ACD (Adaptive C= lock Distribution) configuration. --- Generated by Claude Code Patch Reviewer