From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: PCI: Remove device links to PHY Date: Tue, 10 Mar 2026 11:57:16 +1000 Message-ID: In-Reply-To: <20260309190842.927634-9-vladimir.oltean@nxp.com> References: <20260309190842.927634-1-vladimir.oltean@nxp.com> <20260309190842.927634-9-vladimir.oltean@nxp.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review This is a more substantive change. It reverts manual `device_link_add()` ca= lls in cadence, dra7xx, and keystone PCI drivers, arguing that since commit= `987351e1ea77` (2019) the PHY core already adds device links. The rationale is solid =E2=80=94 the PHY core's device link support makes t= hese manual links redundant. The cleanup in cadence is clean: removes the `= link` array allocation, the `device_link_add()` calls, and the `device_link= _del()` cleanup paths. Same for dra7xx and keystone. One observation on keystone: ```c - if (!phy[i]) - continue; - - link[i] =3D device_link_add(dev, &phy[i]->dev, DL_FLAG_STATELESS); ``` The `NULL` check on `phy[i]` was part of the device link code path. After r= emoval, the `devm_phy_optional_get()` can return NULL and that's fine =E2= =80=94 subsequent PHY operations are NULL-tolerant. No functional issue. Already `Acked-by: Bjorn Helgaas`. Looks correct. --- Generated by Claude Code Patch Reviewer