Claude review: gpu: nova-core: convert falcon registers to kernel register macro

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

This is the largest patch (454 insertions, 1293 deletions). Key changes:

1. **`bounded_enum` refinement**: The `From` variant now uses `MAX.. => unreachable!()` instead of `build_error!()`, and adds `const MAX: $width = 1 << $length` to catch missing values at compile time. The `{ $value }` braces are added around const expressions in `Bounded::new::<{ $value }>()`.

2. **All falcon enum types** (`FalconCoreRev`, `FalconCoreRevSubversion`, `FalconSecurityModel`, `FalconModSelAlgo`, `DmaTrfCmdSize`, `PeregrineCoreSelect`, `FalconFbifTarget`, `FalconFbifMemType`) are converted from manual `repr(u8)` + `TryFrom<u8>` + `impl_from_enum_to_u8!` to `bounded_enum!`.

3. **`FalconEngine` trait**: Drops `const ID: Self` — the kernel register macro uses `RegisterBase` trait and `WithBase::of::<E>()` instead of passing singleton references.

4. **Register I/O pattern change**: From `REG::read(bar, &E::ID)` / `REG::default().set_field(val).write(bar, &E::ID)` to `bar.read(REG::of::<E>())` / `bar.write(WithBase::of::<E>(), REG::zeroed().with_field(val))`.

5. **`NV_PFALCON_FALCON_DMATRFCMD::with_falcon_mem`**: Now uses `with_const_sec::<1>()` / `with_const_sec::<0>()` instead of `set_sec(1)` / `set_sec(0)` — this is presumably because the field is a `Bounded` type requiring const construction.

6. **`NV_PFALCON_FALCON_RM`**: Changed from `.set_value(bar.read(regs::NV_PMC_BOOT_0).into())` to `NV_PFALCON_FALCON_RM::from(bar.read(regs::NV_PMC_BOOT_0).into_raw())`. This constructs the register directly from the raw u32 value rather than building it field-by-field — semantically the same since the register has a single 31:0 `value` field.

7. **`regs/macros.rs` deletion**: 739 lines removed. Good riddance.

One minor note on `NV_PFALCON_FALCON_DMATRFBASE1`:
```rust
-            .set_base((dma_start >> 40) as u16)
+            regs::NV_PFALCON_FALCON_DMATRFBASE1::zeroed().try_with_base(dma_start >> 40)?,
```
The old code used `as u16` which silently truncates. The new code uses `try_with_base()` which returns an error if the value doesn't fit in the 9-bit field (bits 8:0). This is a subtle behavioral improvement — previously a too-large value would silently wrap, now it returns `EINVAL`.

In `bootloader.rs`, the FBIF TRANSCFG update changes from `try_update()` returning `Result` to `bar.update()` with `.try_at().ok_or(EINVAL)?` for bounds checking. The error path is preserved correctly.

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