From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/tyr: Add fields for MEMATTR register Date: Wed, 25 Mar 2026 07:08:44 +1000 Message-ID: In-Reply-To: <20260323-b4-tyr-use-register-macro-v3-v3-8-a87daf9e4701@collabora.com> References: <20260323-b4-tyr-use-register-macro-v3-v3-0-a87daf9e4701@collabora.com> <20260323-b4-tyr-use-register-macro-v3-v3-8-a87daf9e4701@collabora.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review The `MMU_MEMATTR_STAGE1` virtual register pattern is clever =E2=80=93 using= `register!` to define an 8-bit bitfield type, then embedding 8 instances a= s fields in the 64-bit `MEMATTR` register. The `TryFrom>` a= nd `From` for `Bounded` conversions bridge the = u8 sub-register to the u64 parent register's field width. --- Generated by Claude Code Patch Reviewer