From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/i915/color: Extract HDR post-CSC LUT programming to helper function Date: Sun, 12 Apr 2026 13:07:24 +1000 Message-ID: In-Reply-To: <20260408051514.608781-9-chaitanya.kumar.borah@intel.com> References: <20260408051514.608781-1-chaitanya.kumar.borah@intel.com> <20260408051514.608781-9-chaitanya.kumar.borah@intel.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review **Issue (minor)**: The commit message says "removes the segment 0 index register writes as it is not currently programmed." The old code had: ```c intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(...), PLANE_PAL_PREC_AUTO_INCREMENT); ... intel_de_write_dsb(display, dsb, PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(...), 0); ``` These are silently removed in the refactoring. While the old code had a `/*TODO: Add for segment 0 */` comment and wasn't programming any actual data to segment 0, removing the index register setup changes behavior. If the hardware requires the segment 0 index to be reset to 0 after programming, this could leave it in an inconsistent state. At minimum, a comment explaining why segment 0 programming is intentionally omitted would help future readers. --- Generated by Claude Code Patch Reviewer