From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/panthor: Use a local iomem base for MMU AS registers Date: Sun, 12 Apr 2026 09:38:16 +1000 Message-ID: In-Reply-To: <20260410164637.549145-9-karunika.choo@arm.com> References: <20260410164637.549145-1-karunika.choo@arm.com> <20260410164637.549145-9-karunika.choo@arm.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit MIME-Version: 1.0 Patch Review The rename from `MMU_BASE` to `MMU_AS_BASE` and the change of `MMU_AS(as)` from `(MMU_BASE + ((as) << MMU_AS_SHIFT))` to `((as) << MMU_AS_SHIFT)` is correct. With `mmu->iomem = ptdev->iomem + MMU_AS_BASE`, all AS register accesses compute the correct absolute offset. The MMU IRQ accesses via `mmu->irq.iomem` (base 0x2000) with generic `INT_CLEAR` etc. are correct. The removal of absolute `MMU_INT_RAWSTAT`/`MMU_INT_CLEAR`/etc. defines is correct -- these are now accessed through the generic `INT_*` offsets. No issues. --- **Summary of required fixes before merging:** | Severity | Patch | Issue | |----------|-------|-------| | Critical | 6 | `panthor_hw.c` reads PWR_*_PRESENT with now-relative offsets via `ptdev->iomem` -- wrong registers | | Build break | 4 | `GPU_CONTROL_BASE` used before defined (bisection failure) | | Bug | 3 | Function names `panthor_gpu_get_timestap*` misspelled (missing 'm') | | Minor | 3 | Stray `\` line continuation in `panthor_fw_ring_csg_doorbells` | | Minor | 4 | Generic `INT_RAWSTAT`/`INT_CLEAR`/etc. macro names risk collisions | | Minor | 2 | Original copyright attributions dropped from split headers | --- Generated by Claude Code Patch Reviewer