From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/tidss: Add external data and sync signal edge configuration Date: Thu, 23 Apr 2026 09:45:59 +1000 Message-ID: In-Reply-To: <20260420-beagley-ai-display-v1-9-f628543dfd14@ideasonboard.com> References: <20260420-beagley-ai-display-v1-0-f628543dfd14@ideasonboard.com> <20260420-beagley-ai-display-v1-9-f628543dfd14@ideasonboard.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review The DPI0_CLK_CTRL register programming logic looks correct: `DPI0_CLK_CTRL_= DATA_CLK_INVDIS` disables data clock inversion (i.e., set when data should = be driven on rising edge, matching `!ipc`), and `DPI0_CLK_CTRL_SYNC_CLK_INV= DIS` disables sync clock inversion (set when sync is on rising edge, matchi= ng `rf`). **Issue =E2=80=94 `syscon_regmap_lookup_by_compatible()`:** This does a glo= bal search for any node with `compatible =3D "ti,am625-dss-dpi0-clk-ctrl"`.= On AM62P with two DSS instances sharing one DPI0_CLK_CTRL register, this w= orks by coincidence. But the usual kernel pattern is `syscon_regmap_lookup_= by_phandle()` referencing a phandle property in the DSS node (like the exis= ting `ti,oldi-io-ctrl` pattern for OLDI). The error message even says "sysc= on_regmap_lookup_by_phandle failed" which is misleading since it's actually= a by-compatible lookup. Consider switching to a phandle-based lookup (and = adding the property to the DT binding). --- Generated by Claude Code Patch Reviewer