From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: arm64: dts: ti: k3-am62-verdin: Add Toradex OV5640 CSI Cameras Date: Mon, 25 May 2026 18:25:02 +1000 Message-ID: In-Reply-To: <20260522161105.277519-22-ivitro@gmail.com> References: <20260522161105.277519-13-ivitro@gmail.com> <20260522161105.277519-22-ivitro@gmail.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review Good use of a shared `.dtsi` file with two thin `.dtso` wrappers that only = override `clock-frequency` (27 MHz vs 24 MHz). Clean factoring. - The `clk_ov5640_osc` fixed-clock node is defined without a `clock-frequen= cy` =E2=80=94 it must be set by the including `.dtso`. This works because o= verlays are compiled as complete units, and the `.dtsi` is included into th= e `.dtso` before compilation. - The `regulator_camera` uses `gpio =3D <&main_gpio0 42 GPIO_ACTIVE_HIGH>` = with `enable-active-high` =E2=80=94 correct for a GPIO-controlled power swi= tch. - All three OV5640 supply rails (`AVDD`, `DOVDD`, `DVDD`) point to `®ula= tor_camera`. This is a simplification =E2=80=94 the OV5640 datasheet specif= ies different voltages for each rail (2.8V analog, 1.8V IO, 1.5V digital co= re). This is common in DTS for modules where a single power control GPIO ga= tes all rails through the module's on-board regulators. - The camera endpoint specifies `data-lanes =3D <1 2>` (2-lane CSI-2) and `= bus-type =3D <4>` (CSI-2 D-PHY) on both sides of the link. Correct. **No issues.** --- Generated by Claude Code Patch Reviewer