From mboxrd@z Thu Jan 1 00:00:00 1970 From: Claude Code Review Bot To: dri-devel-reviews@example.com Subject: Claude review: drm/tidss: Add external data and sync signal edge configuration Date: Thu, 04 Jun 2026 16:54:12 +1000 Message-ID: In-Reply-To: <20260529-beagley-ai-display-v3-9-7fefdc5d1adf@ideasonboard.com> References: <20260529-beagley-ai-display-v3-0-7fefdc5d1adf@ideasonboard.com> <20260529-beagley-ai-display-v3-9-7fefdc5d1adf@ideasonboard.com> X-Mailer: Claude Code Patch Reviewer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Patch Review Adds syscon-based DPI0_CLK_CTRL register support. The error handling for th= e syscon lookup is correct =E2=80=94 `-ENOENT` is treated as optional (prop= erty absent), other errors are propagated. **Minor observation:** The `+ 0x0` offset in the regmap_write is unnecessar= y but harmless: ```c + regmap_write(dispc->syscon_dpi_io_ctrl, + dispc->syscon_dpi_io_ctrl_offset + 0x0, ``` The `+ 0x0` could simply be removed, though it might be intentional for cla= rity that there could be other offsets from the base. --- Generated by Claude Code Patch Reviewer