From: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
To: Konrad Dybcio <konradybcio@kernel.org>
Cc: Rob Clark <robin.clark@oss.qualcomm.com>,
Dmitry Baryshkov <lumag@kernel.org>,
Abhinav Kumar <abhinav.kumar@linux.dev>,
Jessica Zhang <jesszhan0024@gmail.com>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH] drm/msm/mdss: Add a TODO for better managing the MDSS clock power state
Date: Tue, 10 Mar 2026 15:37:00 +0200 [thread overview]
Message-ID: <rn3jeugxuyrm6iihsmivzrw5iuhgtleby3eir7kmfvmdwi2dyt@pueuga2tx72u> (raw)
In-Reply-To: <20260310-topic-mdss_power_todo-v1-1-59457b8b7486@oss.qualcomm.com>
On Tue, Mar 10, 2026 at 02:20:25PM +0100, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
> There's a small window where the MDP clock could be set to a high rate
> (say, from the bootloader) without a corresponding RPM(H)PD vote to
> back it up. This is normally not an issue, but could be, if rmmod fails
> to shut down the display driver cleanly, and the module is inserted
> again, or when the providers' .sync_state has timed out.
>
> Mark a TODO to fix it one day. Linking the relevant discussion below.
>
> Link: https://lore.kernel.org/linux-arm-msm/d5c4eed5-bd87-4156-b178-2d78140ec8a9@oss.qualcomm.com/
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
> ---
> drivers/gpu/drm/msm/msm_mdss.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
> index 9047e8d9ee89..b783dfec83b8 100644
> --- a/drivers/gpu/drm/msm/msm_mdss.c
> +++ b/drivers/gpu/drm/msm/msm_mdss.c
> @@ -262,6 +262,14 @@ static int msm_mdss_enable(struct msm_mdss *msm_mdss)
> icc_set_bw(msm_mdss->reg_bus_path, 0,
> msm_mdss->reg_bus_bw);
>
> + /*
> + * TODO:
> + * Previous users (e.g. the bootloader) may have left this clock at a high rate, which
> + * would remain set, as prepare_enable() doesn't reprogram it. This theoretically poses a
> + * risk of brownout, but realistically this path is almost exclusively excercised after the
> + * correct OPP has been set in one of the MDPn or DPU drivers, or during initial probe,
> + * before the RPM(H)PD sync_state is done.
> + */
I'd have preferred if it was not exercising 100-char limit, but there is
no reason to enforce that.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ret = clk_bulk_prepare_enable(msm_mdss->num_clocks, msm_mdss->clocks);
> if (ret) {
> dev_err(msm_mdss->dev, "clock enable failed, ret:%d\n", ret);
>
> ---
> base-commit: fc7b1a72c6cd5cbbd989c6c32a6486e3e4e3594d
> change-id: 20260310-topic-mdss_power_todo-4a19cf5f5183
>
> Best regards,
> --
> Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
--
With best wishes
Dmitry
next prev parent reply other threads:[~2026-03-10 13:37 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-10 13:20 [PATCH] drm/msm/mdss: Add a TODO for better managing the MDSS clock power state Konrad Dybcio
2026-03-10 13:37 ` Dmitry Baryshkov [this message]
2026-03-11 3:15 ` Claude review: " Claude Code Review Bot
2026-03-11 3:15 ` Claude Code Review Bot
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