Re: [PATCH] drm/bridge: lt9611uxc: support displays with up to 4 EDID blocks

[Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>]

On Sun, May 17, 2026 at 11:44:49PM +0530, vishnu.saini@oss.qualcomm.com wrote:
> From: Ravi Agola <raviagol@qti.qualcomm.com>
> 
> The LT9611UXC bridge can fetch only 2 EDID blocks at a time, which
> previously limited EDID reading to 2 blocks and prevented support
> for displays exposing more than 2 EDID blocks.
> 
> Extend the driver to support up to 4 EDID blocks by re-triggering
> EDID access after the first 2 blocks are read. For block 2, clear
> the EDID ready flag in 0xb02a so the bridge can expose the remaining
> blocks, then retry the read until the expected EDID is returned.

Won't this affect re-reading of the EDID? If so, we might need to reset
the flag at the block0 path too.

> 
> Also cache the full EDID blob in the driver and reuse it until the
> next HPD disconnect event, so repeated EDID reads do not re-query
> the bridge.

Separte commit, separate justification. Most of the drivers don't use
the cache, so, I'd say, most likely no.

> 
> Signed-off-by: Ravi Agola <raviagol@qti.qualcomm.com>
> Signed-off-by: Vishnu Saini <vishnu.saini@oss.qualcomm.com>
> ---
>  drivers/gpu/drm/bridge/lontium-lt9611uxc.c | 84 ++++++++++++++++++++++++++----
>  1 file changed, 73 insertions(+), 11 deletions(-)
> 
-- 
With best wishes
Dmitry