Re: [PATCH v2 02/11] drm/panthor: Move the register accessors before the IRQ helpers

[Chia-I Wu <olvaffe@gmail.com>]

On Tue, May 12, 2026 at 5:14 AM Boris Brezillon
<boris.brezillon@collabora.com> wrote:
>
> We're about to add an IRQ inline helper using gpu_read(). Move things
> around to avoid forward declarations.
>
> No functional changes.
>
> Reviewed-by: Steven Price <steven.price@arm.com>
> Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>

This can be dropped if patch 3 uses non-inline functions.

> ---
>  drivers/gpu/drm/panthor/panthor_device.h | 142 +++++++++++++++----------------
>  1 file changed, 71 insertions(+), 71 deletions(-)
>
> diff --git a/drivers/gpu/drm/panthor/panthor_device.h b/drivers/gpu/drm/panthor/panthor_device.h
> index 3f91ba73829d..768fc1992368 100644
> --- a/drivers/gpu/drm/panthor/panthor_device.h
> +++ b/drivers/gpu/drm/panthor/panthor_device.h
> @@ -495,6 +495,77 @@ panthor_exception_is_fault(u32 exception_code)
>  const char *panthor_exception_name(struct panthor_device *ptdev,
>                                    u32 exception_code);
>
> +static inline void gpu_write(void __iomem *iomem, u32 reg, u32 data)
> +{
> +       writel(data, iomem + reg);
> +}
> +
> +static inline u32 gpu_read(void __iomem *iomem, u32 reg)
> +{
> +       return readl(iomem + reg);
> +}
> +
> +static inline u32 gpu_read_relaxed(void __iomem *iomem, u32 reg)
> +{
> +       return readl_relaxed(iomem + reg);
> +}
> +
> +static inline void gpu_write64(void __iomem *iomem, u32 reg, u64 data)
> +{
> +       gpu_write(iomem, reg, lower_32_bits(data));
> +       gpu_write(iomem, reg + 4, upper_32_bits(data));
> +}
> +
> +static inline u64 gpu_read64(void __iomem *iomem, u32 reg)
> +{
> +       return (gpu_read(iomem, reg) | ((u64)gpu_read(iomem, reg + 4) << 32));
> +}
> +
> +static inline u64 gpu_read64_relaxed(void __iomem *iomem, u32 reg)
> +{
> +       return (gpu_read_relaxed(iomem, reg) |
> +               ((u64)gpu_read_relaxed(iomem, reg + 4) << 32));
> +}
> +
> +static inline u64 gpu_read64_counter(void __iomem *iomem, u32 reg)
> +{
> +       u32 lo, hi1, hi2;
> +       do {
> +               hi1 = gpu_read(iomem, reg + 4);
> +               lo = gpu_read(iomem, reg);
> +               hi2 = gpu_read(iomem, reg + 4);
> +       } while (hi1 != hi2);
> +       return lo | ((u64)hi2 << 32);
> +}
> +
> +#define gpu_read_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us)     \
> +       read_poll_timeout(gpu_read, val, cond, delay_us, timeout_us, false,     \
> +                         iomem, reg)
> +
> +#define gpu_read_poll_timeout_atomic(iomem, reg, val, cond, delay_us,          \
> +                                    timeout_us)                                \
> +       read_poll_timeout_atomic(gpu_read, val, cond, delay_us, timeout_us,     \
> +                                false, iomem, reg)
> +
> +#define gpu_read64_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us)   \
> +       read_poll_timeout(gpu_read64, val, cond, delay_us, timeout_us, false,   \
> +                         iomem, reg)
> +
> +#define gpu_read64_poll_timeout_atomic(iomem, reg, val, cond, delay_us,                \
> +                                      timeout_us)                              \
> +       read_poll_timeout_atomic(gpu_read64, val, cond, delay_us, timeout_us,   \
> +                                false, iomem, reg)
> +
> +#define gpu_read_relaxed_poll_timeout_atomic(iomem, reg, val, cond, delay_us,  \
> +                                            timeout_us)                        \
> +       read_poll_timeout_atomic(gpu_read_relaxed, val, cond, delay_us,         \
> +                                timeout_us, false, iomem, reg)
> +
> +#define gpu_read64_relaxed_poll_timeout(iomem, reg, val, cond, delay_us,       \
> +                                       timeout_us)                             \
> +       read_poll_timeout(gpu_read64_relaxed, val, cond, delay_us, timeout_us,  \
> +                         false, iomem, reg)
> +
>  #define INT_RAWSTAT 0x0
>  #define INT_CLEAR   0x4
>  #define INT_MASK    0x8
> @@ -629,75 +700,4 @@ static inline void panthor_ ## __name ## _irq_disable_events(struct panthor_irq
>
>  extern struct workqueue_struct *panthor_cleanup_wq;
>
> -static inline void gpu_write(void __iomem *iomem, u32 reg, u32 data)
> -{
> -       writel(data, iomem + reg);
> -}
> -
> -static inline u32 gpu_read(void __iomem *iomem, u32 reg)
> -{
> -       return readl(iomem + reg);
> -}
> -
> -static inline u32 gpu_read_relaxed(void __iomem *iomem, u32 reg)
> -{
> -       return readl_relaxed(iomem + reg);
> -}
> -
> -static inline void gpu_write64(void __iomem *iomem, u32 reg, u64 data)
> -{
> -       gpu_write(iomem, reg, lower_32_bits(data));
> -       gpu_write(iomem, reg + 4, upper_32_bits(data));
> -}
> -
> -static inline u64 gpu_read64(void __iomem *iomem, u32 reg)
> -{
> -       return (gpu_read(iomem, reg) | ((u64)gpu_read(iomem, reg + 4) << 32));
> -}
> -
> -static inline u64 gpu_read64_relaxed(void __iomem *iomem, u32 reg)
> -{
> -       return (gpu_read_relaxed(iomem, reg) |
> -               ((u64)gpu_read_relaxed(iomem, reg + 4) << 32));
> -}
> -
> -static inline u64 gpu_read64_counter(void __iomem *iomem, u32 reg)
> -{
> -       u32 lo, hi1, hi2;
> -       do {
> -               hi1 = gpu_read(iomem, reg + 4);
> -               lo = gpu_read(iomem, reg);
> -               hi2 = gpu_read(iomem, reg + 4);
> -       } while (hi1 != hi2);
> -       return lo | ((u64)hi2 << 32);
> -}
> -
> -#define gpu_read_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us)     \
> -       read_poll_timeout(gpu_read, val, cond, delay_us, timeout_us, false,     \
> -                         iomem, reg)
> -
> -#define gpu_read_poll_timeout_atomic(iomem, reg, val, cond, delay_us,          \
> -                                    timeout_us)                                \
> -       read_poll_timeout_atomic(gpu_read, val, cond, delay_us, timeout_us,     \
> -                                false, iomem, reg)
> -
> -#define gpu_read64_poll_timeout(iomem, reg, val, cond, delay_us, timeout_us)   \
> -       read_poll_timeout(gpu_read64, val, cond, delay_us, timeout_us, false,   \
> -                         iomem, reg)
> -
> -#define gpu_read64_poll_timeout_atomic(iomem, reg, val, cond, delay_us,                \
> -                                      timeout_us)                              \
> -       read_poll_timeout_atomic(gpu_read64, val, cond, delay_us, timeout_us,   \
> -                                false, iomem, reg)
> -
> -#define gpu_read_relaxed_poll_timeout_atomic(iomem, reg, val, cond, delay_us,  \
> -                                            timeout_us)                        \
> -       read_poll_timeout_atomic(gpu_read_relaxed, val, cond, delay_us,         \
> -                                timeout_us, false, iomem, reg)
> -
> -#define gpu_read64_relaxed_poll_timeout(iomem, reg, val, cond, delay_us,       \
> -                                       timeout_us)                             \
> -       read_poll_timeout(gpu_read64_relaxed, val, cond, delay_us, timeout_us,  \
> -                         false, iomem, reg)
> -
>  #endif
>
> --
> 2.54.0
>