From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: drm/bridge: adv7511: Clear HPD IRQ during atomic_enable()
Date: Thu, 23 Apr 2026 07:43:34 +1000 [thread overview]
Message-ID: <review-overall-20260422121457.166780-1-biju.das.jz@bp.renesas.com> (raw)
In-Reply-To: <20260422121457.166780-1-biju.das.jz@bp.renesas.com>
Overall Series Review
Subject: drm/bridge: adv7511: Clear HPD IRQ during atomic_enable()
Author: Biju <biju.das.au@gmail.com>
Patches: 2
Reviewed: 2026-04-23T07:43:34.470013
---
This is a single-patch series fixing a real suspend/resume bug on the RZ/G3E SMARC EVK with the ADV7535 bridge chip. After suspend-to-RAM via PSCI, the chip loses power entirely, and the HPD status bit in `ADV7511_REG_INT(0)` retains a stale latched value on resume. When `drm_mode_config_helper_resume()` calls `atomic_enable()`, this stale bit is never cleared, causing incorrect behavior.
The fix is straightforward and correct: write `ADV7511_INT0_HPD` to `ADV7511_REG_INT(0)` (a write-1-to-clear register) immediately after `adv7511_power_on()` in `adv7511_bridge_atomic_enable()`. This exactly matches the existing interrupt-clearing pattern used in `adv7511_hpd()` (line ~395) and `adv7511_irq_process()` (line ~453) elsewhere in the same driver.
**Recommendation: This patch looks good to merge.**
---
Generated by Claude Code Patch Reviewer
next prev parent reply other threads:[~2026-04-22 21:43 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-22 12:14 [PATCH v2] drm/bridge: adv7511: Clear HPD IRQ during atomic_enable() Biju
2026-04-22 13:34 ` Tommaso Merciai
2026-04-22 21:43 ` Claude Code Review Bot [this message]
2026-04-22 21:43 ` Claude review: " Claude Code Review Bot
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