From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: accel: ethosu: Add performance counter support
Date: Sat, 16 May 2026 10:08:39 +1000 [thread overview]
Message-ID: <review-overall-20260515032625.1880618-1-robh@kernel.org> (raw)
In-Reply-To: <20260515032625.1880618-1-robh@kernel.org>
Overall Series Review
Subject: accel: ethosu: Add performance counter support
Author: "Rob Herring (Arm)" <robh@kernel.org>
Patches: 1
Reviewed: 2026-05-16T10:08:39.258984
---
This is a single-patch series (v2) adding PMU performance counter support to the Arm Ethos-U NPU accelerator driver. The implementation is modeled after V3D's perfmon subsystem. The design is straightforward: userspace creates a perfmon object with desired event counters, attaches it to job submissions (or sets it as a global monitor), and reads back accumulated counter values. The code uses XArray for ID allocation, refcounting for perfmon lifetime, and a per-device spinlock for protecting active perfmon state.
Overall the patch is in reasonable shape for a v2 but has several issues that should be addressed before merging, ranging from a likely crash bug in `pmu_regs` initialization, to UAPI struct padding/alignment concerns, to locking and data-race issues.
---
Generated by Claude Code Patch Reviewer
next prev parent reply other threads:[~2026-05-16 0:08 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-05-15 3:26 [PATCH v2] accel: ethosu: Add performance counter support Rob Herring (Arm)
2026-05-16 0:08 ` Claude review: " Claude Code Review Bot
2026-05-16 0:08 ` Claude Code Review Bot [this message]
-- strict thread matches above, loose matches on Subject: below --
2026-03-06 16:36 [PATCH] " Rob Herring (Arm)
2026-03-08 22:34 ` Claude review: " Claude Code Review Bot
2026-03-08 22:34 ` Claude Code Review Bot
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