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From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: drm/amdgpu: replace PASID IDR with XArray
Date: Wed, 01 Apr 2026 07:43:14 +1000	[thread overview]
Message-ID: <review-patch1-20260331142127.52796-1-mikhail.v.gavrilov@gmail.com> (raw)
In-Reply-To: <20260331142127.52796-1-mikhail.v.gavrilov@gmail.com>

Patch Review

**Critical bug — wrong locking wrappers:**

```c
+	r = xa_alloc_cyclic(&amdgpu_pasid_xa, &pasid, xa_mk_value(0),
+			    XA_LIMIT(1, (1U << bits) - 1),
+			    &amdgpu_pasid_xa_next, GFP_KERNEL);
```

This must be `xa_alloc_cyclic_irq()` to disable interrupts while holding the xa_lock. The plain `xa_alloc_cyclic()` uses `xa_lock()`/`xa_unlock()` (see `include/linux/xarray.h:976-987`), which does not disable IRQs.

```c
+	xa_erase(&amdgpu_pasid_xa, pasid);
```

This must be `xa_erase_irq()`. The plain `xa_erase()` uses `xa_lock()`/`xa_unlock()` (see `lib/xarray.c:1665-1674`), which does not disable IRQs. Since `amdgpu_pasid_free()` can be called from hardirq context (via the fence signal path documented in the commit message), and `xa_alloc_cyclic()` in process context takes the same lock without disabling IRQs, the exact same deadlock scenario described in the commit message still applies.

**The fix:** Replace `xa_alloc_cyclic()` with `xa_alloc_cyclic_irq()` and `xa_erase()` with `xa_erase_irq()`. Alternatively, use explicit `xa_lock_irqsave()`/`__xa_erase()`/`xa_unlock_irqrestore()` in `amdgpu_pasid_free()` (since it's called from hardirq, `_irqsave` is the safest choice there), and `xa_alloc_cyclic_irq()` for the allocation path.

**Note:** The v5 changelog mentions that the author previously used explicit `xa_lock_irqsave`/`__xa_erase` for this exact reason, but was told to use the convenience wrappers in v6. The v6/v7 approach unfortunately reintroduces the problem.

**Minor nits (non-blocking):**

- The `XA_FLAGS_LOCK_IRQ` flag in `DEFINE_XARRAY_FLAGS` is not harmful, but it also isn't doing what the author thinks. It sets the lock class for lockdep — it doesn't make convenience wrappers use IRQ-safe locking. It's still correct to set it (it tells lockdep the lock is used in IRQ context), but the actual API calls must be the `_irq` variants.

- The `xa_mk_value(0)` store is fine — it stores a non-NULL value so the slot is occupied, preventing double-allocation of the same PASID.

- The `XA_FLAGS_ALLOC1` usage is correct (zero is not a valid PASID), though the `XA_LIMIT(1, ...)` already enforces the minimum of 1.

- The cleanup function change to `xa_destroy()` is correct and straightforward.

---
Generated by Claude Code Patch Reviewer

  parent reply	other threads:[~2026-03-31 21:43 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-31 14:21 [PATCH v7] drm/amdgpu: replace PASID IDR with XArray Mikhail Gavrilov
2026-03-31 14:29 ` Christian König
2026-03-31 14:38   ` Alex Deucher
2026-03-31 17:12     ` Mikhail Gavrilov
2026-03-31 21:43 ` Claude review: " Claude Code Review Bot
2026-03-31 21:43 ` Claude Code Review Bot [this message]
  -- strict thread matches above, loose matches on Subject: below --
2026-03-31 11:17 [PATCH v6] " Mikhail Gavrilov
2026-03-31 21:48 ` Claude review: " Claude Code Review Bot
2026-03-31 21:48 ` Claude Code Review Bot
2026-03-30 19:11 [PATCH v5] " Mikhail Gavrilov
2026-03-31  6:57 ` Claude review: " Claude Code Review Bot
2026-03-31  6:57 ` Claude Code Review Bot
2026-03-30 14:50 [PATCH v4] " Mikhail Gavrilov
2026-03-31  7:08 ` Claude review: " Claude Code Review Bot
2026-03-31  7:08 ` Claude Code Review Bot
2026-03-30 11:35 [PATCH v3] " Mikhail Gavrilov
2026-03-31  7:18 ` Claude review: " Claude Code Review Bot
2026-03-31  7:18 ` Claude Code Review Bot

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