Claude review: drm/msm/adreno: fix userspace-triggered crash on a2xx-a4xx

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

**Problem analysis:** Confirmed correct. The kernel source tree shows:
- `a5xx_gpu.c` sets `adreno_gpu->ubwc_config = &adreno_gpu->_ubwc_config` (line 1778)
- `a6xx_gpu.c` sets `gpu->ubwc_config = &gpu->_ubwc_config` (line 807)
- `a2xx_gpu.c`, `a3xx_gpu.c`, `a4xx_gpu.c` never touch `ubwc_config` — the pointer remains NULL from `kzalloc`

Since `MSM_PARAM_HIGHEST_BANK_BIT` (0x10), `MSM_PARAM_UBWC_SWIZZLE` (0x12), and `MSM_PARAM_MACROTILE_MODE` (0x13) are all UAPI params, any userspace program can query them and trigger the NULL dereference on pre-a5xx hardware.

**Code review:**

The three guard clauses are identical in structure and correct:

```c
case MSM_PARAM_HIGHEST_BANK_BIT:
	if (!adreno_gpu->ubwc_config)
		return UERR(ENOENT, drm, "no UBWC on this platform");
	*value = adreno_gpu->ubwc_config->highest_bank_bit;
	return 0;
```

- The `UERR(ENOENT, ...)` macro expands to `DRM_DEV_DEBUG_DRIVER(...)` followed by returning `-ENOENT`. This is appropriate — `ENOENT` signals "this parameter doesn't exist on this hardware" which is semantically correct and matches the review feedback.
- The debug message is helpful for userspace developers without being noisy (it's `DEBUG_DRIVER` level, not a warning).
- All three UBWC-related params are covered: `HIGHEST_BANK_BIT`, `UBWC_SWIZZLE`, and `MACROTILE_MODE`. No UBWC-related params are missed.

**No issues found.** The patch is minimal, correct, has proper `Fixes:` tag, and addresses the review feedback from v1/v2. 

Reviewed-by worthy.

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Generated by Claude Code Patch Reviewer