Claude review: gpu/drm: bridge: tc358768: Add delay after PLL setup

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

**The fix itself is correct in placement.** Looking at the PLL setup sequence:

```c
/* wait for lock */
usleep_range(1000, 2000);

/* FRS[11:10] LBWS[9:8] CKEN[4] PLL_CKEN[4] RESETB[1] EN[0] */
tc358768_write(priv, TC358768_PLLCTL1,
               (frs << 10) | (0x2 << 8) | BIT(4) | BIT(1) | BIT(0));
```

The existing 1-2ms delay waits for the PLL to lock before enabling `PLL_CKEN` (BIT(4)). The new 20ms `msleep()` is placed *after* `tc358768_setup_pll()` returns — i.e., after `PLL_CKEN` is enabled — giving the clock output time to propagate and stabilize before the DSI register configuration begins. This is a reasonable hardware settling requirement.

**Minor concerns:**

1. **Delay magnitude**: 20ms is a fairly generous delay. The commit message says "small settling delay" but doesn't reference a datasheet timing spec. It would be good to know whether 20ms is derived from the TC358768 datasheet or found empirically. If empirical, a comment noting the origin (e.g., "empirically determined on TF700T") would help future maintainers understand whether this can be tightened. That said, 20ms in a `pre_enable` path is unlikely to cause user-visible latency issues — modeset paths are inherently slow.

2. **`msleep` vs `usleep_range`**: The kernel convention is to use `usleep_range()` for delays under ~20ms. At exactly 20ms, `msleep()` is acceptable per `Documentation/timers/timers-howto.rst`, but `usleep_range(20000, 25000)` would be slightly more idiomatic and give the scheduler more flexibility. This is a stylistic nit, not a blocking issue.

3. **No datasheet reference**: The TC358768 datasheet likely has a timing spec for the PLL settling time after `PLL_CKEN` assertion. Referencing it (or noting the absence of one) would strengthen the commit message.

**No correctness issues.** The patch is safe to apply — it adds latency only in the modeset path, affects only the TC358768 bridge, and has hardware testing confirmation.

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