Claude review: drm/msm/a6xx: Enable CLX feature on A840

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

**Issue: `a840_limits_tbl` should be `static const`.**

```c
struct a6xx_hfi_limits_tbl a840_limits_tbl[] = {
```

This is missing both `static` and `const`. All other comparable catalog arrays in this file (e.g., `a840_dyn_pwrup_reglist_regs[]`) are `static const`. This table is only referenced through the `DECLARE_ADRENO_LIMITS_TABLE(a840_limits)` macro and should be:
```c
static const struct a6xx_hfi_limits_tbl a840_limits_tbl[] = {
```

Without `static`, the symbol is externally visible (unnecessary namespace pollution). Without `const`, the data goes into the writable data section instead of rodata. Also, as noted above, the `DECLARE_ADRENO_LIMITS_TABLE` macro assigns `name ## _tbl` to a member in a `static const` struct, so having the underlying array be non-const creates a type inconsistency.

**Data tables look reasonable.** Four limits entries (IFF for GX, IFF for MX, PCLX for GX, PCLX for MX) with the MX PCLX entry disabled (`.enable = 0`) — this is a sensible per-domain configuration. The CLX domain table has two domains (GX and MXG) with different current budgets (100 vs 50), which matches the asymmetric power characteristics.

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Generated by Claude Code Patch Reviewer