Claude review: drm/nouveau/dp: retry link check once on HPD IRQ before disconnect

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

**Verdict: Questionable approach — adds latency to a common hot-plug path for all chipsets.**

The change:
```c
 		if (bits & NVIF_CONN_EVENT_V0_IRQ) {
 			if (nouveau_dp_link_check(nv_connector))
 				continue;
+			/* Retry once after 100ms for transient DP glitches (NV50/G94) */
+			msleep(100);
+			if (nouveau_dp_link_check(nv_connector))
+				continue;
 		}
```

**Issue 1: Global impact despite chipset-specific comment.** The comment says "NV50/G94" but `nouveau_display_hpd_work()` is the HPD handler for **all** nouveau-supported hardware. Every DP connector on every supported GPU will now incur a 100ms sleep on any HPD IRQ where the first link check fails. This should either be gated on the chipset or the comment should acknowledge the broader scope.

**Issue 2: msleep(100) in a shared workqueue.** While sleeping in a workqueue is technically valid, this is `nouveau_display_hpd_work` which processes HPD events for potentially multiple connectors in a loop (the `drm_connector_list_iter` at the top). A 100ms stall blocks processing of other connectors' HPD events in the same work item. If multiple connectors fire IRQs simultaneously and all fail the first link check, the cumulative delay compounds.

**Issue 3: Treating the symptom, not the cause.** If the NVAC DP link is transiently failing after DPMS resume, the root cause may be that link training isn't waiting long enough or that the sink isn't ready. A retry loop at the HPD IRQ level is a blunt instrument — the DP link check function itself or the link training code would be a more targeted place to add resilience.

**Issue 4: No Fixes: tag.** If this fixes a user-visible regression or bug, it should include a `Fixes:` tag identifying when the behavior was introduced. Same applies to patches 1 and 2. For stable kernel backporting, `Cc: stable@vger.kernel.org` should be considered.

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