From: Lizhi Hou <lizhi.hou@amd.com>
To: <ogabbay@kernel.org>, <quic_jhugo@quicinc.com>,
<dri-devel@lists.freedesktop.org>, <mario.limonciello@amd.com>,
<maciej.falkowski@linux.intel.com>
Cc: David Zhang <yidong.zhang@amd.com>,
<linux-kernel@vger.kernel.org>, <max.zhen@amd.com>,
<sonal.santan@amd.com>
Subject: [PATCH V1 0/6] accel/amdxdna: Initial support for AIE4 platform
Date: Mon, 30 Mar 2026 09:36:59 -0700 [thread overview]
Message-ID: <20260330163705.3153647-1-lizhi.hou@amd.com> (raw)
From: David Zhang <yidong.zhang@amd.com>
This series adds initial support for AMD NPU (AIE4) platforms, including
the Physical Function with SR-IOV support on PCI device IDs 0x17F2 and
0x1B0B (NPU3).
Support for SR-IOV Virtual Functions and non-SR-IOV configurations will
be added in future patches.
The AIE4 platform uses mechanisms similar to AIE2 for mailbox, PSP, and
SMU interactions. To support this, the driver is refactored to introduce
shared implementations for mailbox, PSP, and SMU, allowing both AIE2 and
AIE4 to reuse common code.
Series structure
(patch 1) Create common mailbox functions
Factor the AIE mailbox send-and-wait and status handling into common code.
AIE2 and AIE4 use same aie_send_mgmt_msg_wait() and DECLARE_AIE_MSG();
(patch 2) Add AIE4 SR-IOV support
Add the AIE4 Physical Function driver and SR-IOV: new PCI IDs and device
table entries. The amdxdna driver is updated with a sriov_configure
callback. The mailbox layer gets helpers so it works for both AIE2
(iohub) and AIE4 (no iohub). UAPI is extended with AMDXDNA_DEV_TYPE_PF.
(patch 3) Create common PSP interfaces
Make PSP support into common code.
(patch 4) AIE4 PSP support and firmware loading
Use PSP common code for AIE4 hardware. Add firmware request code for psp
operations, add NPU3 PSP BAR/register layout in npu3_regs.c.
(patch 5) Create common SMU interfaces
Make SMU support into common code.
(patch 6) AIE4 SMU support
Use SMU common code for AIE4 hardware. Add smu operations, add NPU3 SMU
BAR/register layout in npu3_regs.c.
Testing
Build and load on a system with an AIE4/NPU3 PF; confirm the device is
bound and SR-IOV can be enabled (e.g. via sriov_numvfs). Confirm
AIE2-based devices (e.g. NPU4) still probe and run as before.
David Zhang (5):
accel/amdxdna: Add basic support for AIE4 devices
accel/amdxdna: Create common PSP interfaces for AIE2 and AIE4
accel/amdxdna: Add AIE4 firmware loading
accel/amdxdna: Create common SMU interfaces for AIE2 and AIE4
accel/amdxdna: Add AIE4 power on and off support
Lizhi Hou (1):
accel/amdxdna: Create shared functions for AIE2 and AIE4
drivers/accel/amdxdna/Makefile | 10 +-
drivers/accel/amdxdna/aie.c | 89 +++++
drivers/accel/amdxdna/aie.h | 104 +++++
drivers/accel/amdxdna/aie2_ctx.c | 4 +-
drivers/accel/amdxdna/aie2_error.c | 12 +-
drivers/accel/amdxdna/aie2_message.c | 140 +++----
drivers/accel/amdxdna/aie2_pci.c | 145 +++----
drivers/accel/amdxdna/aie2_pci.h | 93 +----
drivers/accel/amdxdna/aie2_pm.c | 6 +-
drivers/accel/amdxdna/aie2_psp.c | 161 --------
drivers/accel/amdxdna/aie2_smu.c | 156 --------
drivers/accel/amdxdna/aie4_message.c | 27 ++
drivers/accel/amdxdna/aie4_msg_priv.h | 49 +++
drivers/accel/amdxdna/aie4_pci.c | 491 ++++++++++++++++++++++++
drivers/accel/amdxdna/aie4_pci.h | 53 +++
drivers/accel/amdxdna/aie4_sriov.c | 88 +++++
drivers/accel/amdxdna/aie_psp.c | 235 ++++++++++++
drivers/accel/amdxdna/aie_smu.c | 153 ++++++++
drivers/accel/amdxdna/amdxdna_mailbox.c | 19 +-
drivers/accel/amdxdna/amdxdna_mailbox.h | 8 +-
drivers/accel/amdxdna/amdxdna_pci_drv.c | 19 +-
drivers/accel/amdxdna/amdxdna_pci_drv.h | 10 +
drivers/accel/amdxdna/npu1_regs.c | 25 +-
drivers/accel/amdxdna/npu3_regs.c | 77 ++++
drivers/accel/amdxdna/npu4_regs.c | 30 +-
drivers/accel/amdxdna/npu5_regs.c | 2 +-
drivers/accel/amdxdna/npu6_regs.c | 2 +-
include/uapi/drm/amdxdna_accel.h | 3 +-
28 files changed, 1609 insertions(+), 602 deletions(-)
create mode 100644 drivers/accel/amdxdna/aie.c
create mode 100644 drivers/accel/amdxdna/aie.h
delete mode 100644 drivers/accel/amdxdna/aie2_psp.c
delete mode 100644 drivers/accel/amdxdna/aie2_smu.c
create mode 100644 drivers/accel/amdxdna/aie4_message.c
create mode 100644 drivers/accel/amdxdna/aie4_msg_priv.h
create mode 100644 drivers/accel/amdxdna/aie4_pci.c
create mode 100644 drivers/accel/amdxdna/aie4_pci.h
create mode 100644 drivers/accel/amdxdna/aie4_sriov.c
create mode 100644 drivers/accel/amdxdna/aie_psp.c
create mode 100644 drivers/accel/amdxdna/aie_smu.c
create mode 100644 drivers/accel/amdxdna/npu3_regs.c
--
2.34.1
next reply other threads:[~2026-03-30 16:37 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-03-30 16:36 Lizhi Hou [this message]
2026-03-30 16:37 ` [PATCH V1 1/6] accel/amdxdna: Create shared functions for AIE2 and AIE4 Lizhi Hou
2026-03-31 7:05 ` Claude review: " Claude Code Review Bot
2026-03-30 16:37 ` [PATCH V1 2/6] accel/amdxdna: Add basic support for AIE4 devices Lizhi Hou
2026-03-31 7:05 ` Claude review: " Claude Code Review Bot
2026-03-30 16:37 ` [PATCH V1 3/6] accel/amdxdna: Create common PSP interfaces for AIE2 and AIE4 Lizhi Hou
2026-03-31 7:05 ` Claude review: " Claude Code Review Bot
2026-03-30 16:37 ` [PATCH V1 4/6] accel/amdxdna: Add AIE4 firmware loading Lizhi Hou
2026-03-30 20:17 ` Mario Limonciello
2026-03-30 20:30 ` yidong Zhang
2026-03-31 2:45 ` Mario Limonciello
2026-03-31 7:05 ` Claude review: " Claude Code Review Bot
2026-03-30 16:37 ` [PATCH V1 5/6] accel/amdxdna: Create common SMU interfaces for AIE2 and AIE4 Lizhi Hou
2026-03-31 7:05 ` Claude review: " Claude Code Review Bot
2026-03-30 16:37 ` [PATCH V1 6/6] accel/amdxdna: Add AIE4 power on and off support Lizhi Hou
2026-03-31 7:05 ` Claude review: " Claude Code Review Bot
2026-03-31 7:05 ` Claude review: accel/amdxdna: Initial support for AIE4 platform Claude Code Review Bot
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