[PATCH] drm/amd/amdgpu: remove duplicated code in gfx_v11 and gfx_v12

[PATCH] drm/amd/amdgpu: remove duplicated code in gfx_v11 and gfx_v12

[Ulisses Paixao]

The functions gfx_v11_0_handle_priv_fault and gfx_v12_0_handle_priv_fault
are identical. This patch replaces them with a single implementation in
amdgpu_gfx, called amdgpu_gfx_handle_priv_fault, to reduce code
duplication.

Signed-off-by: Ulisses Paixao <ulissespaixao@usp.br>
Co-developed-by: Felipe Sousa <felipesousa@usp.br>
Signed-off-by: Felipe Sousa <felipesousa@usp.br>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 46 +++++++++++++++++++++++++
 drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h |  2 ++
 drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c  | 43 ++---------------------
 drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c  | 43 ++---------------------
 4 files changed, 54 insertions(+), 80 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index b8ca87669..c8d769cb0 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -830,6 +830,52 @@ int amdgpu_gfx_enable_kgq(struct amdgpu_device *adev, int xcc_id)
 	return r;
 }
 
+/**
+ * amdgpu_gfx_handle_priv_fault - Handle privileged instruction fault
+ * 
+ * @adev: amdgpu_device pointer
+ * @entry: interrupt vector entry from the hardware
+ * 
+ * This function handles privileged instruction faults by identifying 
+ * the faulty ring (gfx or compute) and triggering a scheduler fault.
+ */
+void amdgpu_gfx_handle_priv_fault(struct amdgpu_device *adev,
+					struct amdgpu_iv_entry *entry)
+{
+	u8 me_id, pipe_id, queue_id;
+	struct amdgpu_ring *ring;
+	int i;
+
+	me_id = (entry->ring_id & 0x0c) >> 2;
+	pipe_id = (entry->ring_id & 0x03) >> 0;
+	queue_id = (entry->ring_id & 0x70) >> 4;
+
+	if (!adev->gfx.disable_kq) {
+		switch (me_id) {
+		case 0:
+			for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
+				ring = &adev->gfx.gfx_ring[i];
+				if (ring->me == me_id && ring->pipe == pipe_id &&
+				    ring->queue == queue_id)
+					drm_sched_fault(&ring->sched);
+			}
+			break;
+		case 1:
+		case 2:
+			for (i = 0; i < adev->gfx.num_compute_rings; i++) {
+				ring = &adev->gfx.compute_ring[i];
+				if (ring->me == me_id && ring->pipe == pipe_id &&
+				    ring->queue == queue_id)
+					drm_sched_fault(&ring->sched);
+			}
+			break;
+		default:
+			BUG();
+			break;
+		}
+	}
+}
+
 static void amdgpu_gfx_do_off_ctrl(struct amdgpu_device *adev, bool enable,
 				   bool no_delay)
 {
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index a0cf0a3b4..5655af43d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -611,6 +611,8 @@ bool amdgpu_gfx_is_high_priority_graphics_queue(struct amdgpu_device *adev,
 						struct amdgpu_ring *ring);
 bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device *adev, int me,
 				    int pipe, int queue);
+void amdgpu_gfx_handle_priv_fault(struct amdgpu_device *adev,
+					struct amdgpu_iv_entry *entry);
 void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable);
 void amdgpu_gfx_off_ctrl_immediate(struct amdgpu_device *adev, bool enable);
 int amdgpu_get_gfx_off_status(struct amdgpu_device *adev, uint32_t *value);
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 2c6f1e25c..da869f928 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -6684,49 +6684,12 @@ static int gfx_v11_0_set_priv_inst_fault_state(struct amdgpu_device *adev,
 	return 0;
 }
 
-static void gfx_v11_0_handle_priv_fault(struct amdgpu_device *adev,
-					struct amdgpu_iv_entry *entry)
-{
-	u8 me_id, pipe_id, queue_id;
-	struct amdgpu_ring *ring;
-	int i;
-
-	me_id = (entry->ring_id & 0x0c) >> 2;
-	pipe_id = (entry->ring_id & 0x03) >> 0;
-	queue_id = (entry->ring_id & 0x70) >> 4;
-
-	if (!adev->gfx.disable_kq) {
-		switch (me_id) {
-		case 0:
-			for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
-				ring = &adev->gfx.gfx_ring[i];
-				if (ring->me == me_id && ring->pipe == pipe_id &&
-				    ring->queue == queue_id)
-					drm_sched_fault(&ring->sched);
-			}
-			break;
-		case 1:
-		case 2:
-			for (i = 0; i < adev->gfx.num_compute_rings; i++) {
-				ring = &adev->gfx.compute_ring[i];
-				if (ring->me == me_id && ring->pipe == pipe_id &&
-				    ring->queue == queue_id)
-					drm_sched_fault(&ring->sched);
-			}
-			break;
-		default:
-			BUG();
-			break;
-		}
-	}
-}
-
 static int gfx_v11_0_priv_reg_irq(struct amdgpu_device *adev,
 				  struct amdgpu_irq_src *source,
 				  struct amdgpu_iv_entry *entry)
 {
 	DRM_ERROR("Illegal register access in command stream\n");
-	gfx_v11_0_handle_priv_fault(adev, entry);
+	amdgpu_gfx_handle_priv_fault(adev, entry);
 	return 0;
 }
 
@@ -6735,7 +6698,7 @@ static int gfx_v11_0_bad_op_irq(struct amdgpu_device *adev,
 				struct amdgpu_iv_entry *entry)
 {
 	DRM_ERROR("Illegal opcode in command stream\n");
-	gfx_v11_0_handle_priv_fault(adev, entry);
+	amdgpu_gfx_handle_priv_fault(adev, entry);
 	return 0;
 }
 
@@ -6744,7 +6707,7 @@ static int gfx_v11_0_priv_inst_irq(struct amdgpu_device *adev,
 				   struct amdgpu_iv_entry *entry)
 {
 	DRM_ERROR("Illegal instruction in command stream\n");
-	gfx_v11_0_handle_priv_fault(adev, entry);
+	amdgpu_gfx_handle_priv_fault(adev, entry);
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
index 6baac533a..883878e23 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
@@ -5015,49 +5015,12 @@ static int gfx_v12_0_set_priv_inst_fault_state(struct amdgpu_device *adev,
 	return 0;
 }
 
-static void gfx_v12_0_handle_priv_fault(struct amdgpu_device *adev,
-					struct amdgpu_iv_entry *entry)
-{
-	u8 me_id, pipe_id, queue_id;
-	struct amdgpu_ring *ring;
-	int i;
-
-	me_id = (entry->ring_id & 0x0c) >> 2;
-	pipe_id = (entry->ring_id & 0x03) >> 0;
-	queue_id = (entry->ring_id & 0x70) >> 4;
-
-	if (!adev->gfx.disable_kq) {
-		switch (me_id) {
-		case 0:
-			for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
-				ring = &adev->gfx.gfx_ring[i];
-				if (ring->me == me_id && ring->pipe == pipe_id &&
-				    ring->queue == queue_id)
-					drm_sched_fault(&ring->sched);
-			}
-			break;
-		case 1:
-		case 2:
-			for (i = 0; i < adev->gfx.num_compute_rings; i++) {
-				ring = &adev->gfx.compute_ring[i];
-				if (ring->me == me_id && ring->pipe == pipe_id &&
-				    ring->queue == queue_id)
-					drm_sched_fault(&ring->sched);
-			}
-			break;
-		default:
-			BUG();
-			break;
-		}
-	}
-}
-
 static int gfx_v12_0_priv_reg_irq(struct amdgpu_device *adev,
 				  struct amdgpu_irq_src *source,
 				  struct amdgpu_iv_entry *entry)
 {
 	DRM_ERROR("Illegal register access in command stream\n");
-	gfx_v12_0_handle_priv_fault(adev, entry);
+	amdgpu_gfx_handle_priv_fault(adev, entry);
 	return 0;
 }
 
@@ -5066,7 +5029,7 @@ static int gfx_v12_0_bad_op_irq(struct amdgpu_device *adev,
 				struct amdgpu_iv_entry *entry)
 {
 	DRM_ERROR("Illegal opcode in command stream\n");
-	gfx_v12_0_handle_priv_fault(adev, entry);
+	amdgpu_gfx_handle_priv_fault(adev, entry);
 	return 0;
 }
 
@@ -5075,7 +5038,7 @@ static int gfx_v12_0_priv_inst_irq(struct amdgpu_device *adev,
 				   struct amdgpu_iv_entry *entry)
 {
 	DRM_ERROR("Illegal instruction in command stream\n");
-	gfx_v12_0_handle_priv_fault(adev, entry);
+	amdgpu_gfx_handle_priv_fault(adev, entry);
 	return 0;
 }
 
-- 
2.34.1

Re: [PATCH] drm/amd/amdgpu: remove duplicated code in gfx_v11 and gfx_v12

[Christian König]

On 4/29/26 19:36, Ulisses Paixao wrote:
> [Sie erhalten nicht häufig E-Mails von ulissespaixao@usp.br. Weitere Informationen, warum dies wichtig ist, finden Sie unter https://aka.ms/LearnAboutSenderIdentification ]
> 
> The functions gfx_v11_0_handle_priv_fault and gfx_v12_0_handle_priv_fault
> are identical. This patch replaces them with a single implementation in
> amdgpu_gfx, called amdgpu_gfx_handle_priv_fault, to reduce code
> duplication.
> 
> Signed-off-by: Ulisses Paixao <ulissespaixao@usp.br>
> Co-developed-by: Felipe Sousa <felipesousa@usp.br>
> Signed-off-by: Felipe Sousa <felipesousa@usp.br>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 46 +++++++++++++++++++++++++
>  drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h |  2 ++
>  drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c  | 43 ++---------------------
>  drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c  | 43 ++---------------------
>  4 files changed, 54 insertions(+), 80 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> index b8ca87669..c8d769cb0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
> @@ -830,6 +830,52 @@ int amdgpu_gfx_enable_kgq(struct amdgpu_device *adev, int xcc_id)
>         return r;
>  }
> 
> +/**
> + * amdgpu_gfx_handle_priv_fault - Handle privileged instruction fault
> + *
> + * @adev: amdgpu_device pointer
> + * @entry: interrupt vector entry from the hardware
> + *
> + * This function handles privileged instruction faults by identifying
> + * the faulty ring (gfx or compute) and triggering a scheduler fault.
> + */
> +void amdgpu_gfx_handle_priv_fault(struct amdgpu_device *adev,
> +                                       struct amdgpu_iv_entry *entry)
> +{
> +       u8 me_id, pipe_id, queue_id;
> +       struct amdgpu_ring *ring;
> +       int i;
> +
> +       me_id = (entry->ring_id & 0x0c) >> 2;
> +       pipe_id = (entry->ring_id & 0x03) >> 0;
> +       queue_id = (entry->ring_id & 0x70) >> 4;

Even when they are identical on gfx11 and gfx12 this decoding here is HW specific and doesn't belong here.

> +
> +       if (!adev->gfx.disable_kq) {

That check can probably be removed. Both num_gfx_rings and num_compute_rings should be zero in that case.

> +               switch (me_id) {
> +               case 0:
> +                       for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
> +                               ring = &adev->gfx.gfx_ring[i];
> +                               if (ring->me == me_id && ring->pipe == pipe_id &&
> +                                   ring->queue == queue_id)
> +                                       drm_sched_fault(&ring->sched);
> +                       }
> +                       break;
> +               case 1:
> +               case 2:
> +                       for (i = 0; i < adev->gfx.num_compute_rings; i++) {
> +                               ring = &adev->gfx.compute_ring[i];
> +                               if (ring->me == me_id && ring->pipe == pipe_id &&
> +                                   ring->queue == queue_id)
> +                                       drm_sched_fault(&ring->sched);
> +                       }
> +                       break;
> +               default:
> +                       BUG();
> +                       break;
> +               }
> +       }

This part can be moved into amdgpu_gfx. But I would remove the switch (me_id) part and just go over all gfx and compute rings to search for the matching me and pipe.

Regards,
Christian.

> +}
> +
>  static void amdgpu_gfx_do_off_ctrl(struct amdgpu_device *adev, bool enable,
>                                    bool no_delay)
>  {
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> index a0cf0a3b4..5655af43d 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
> @@ -611,6 +611,8 @@ bool amdgpu_gfx_is_high_priority_graphics_queue(struct amdgpu_device *adev,
>                                                 struct amdgpu_ring *ring);
>  bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device *adev, int me,
>                                     int pipe, int queue);
> +void amdgpu_gfx_handle_priv_fault(struct amdgpu_device *adev,
> +                                       struct amdgpu_iv_entry *entry);
>  void amdgpu_gfx_off_ctrl(struct amdgpu_device *adev, bool enable);
>  void amdgpu_gfx_off_ctrl_immediate(struct amdgpu_device *adev, bool enable);
>  int amdgpu_get_gfx_off_status(struct amdgpu_device *adev, uint32_t *value);
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> index 2c6f1e25c..da869f928 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
> @@ -6684,49 +6684,12 @@ static int gfx_v11_0_set_priv_inst_fault_state(struct amdgpu_device *adev,
>         return 0;
>  }
> 
> -static void gfx_v11_0_handle_priv_fault(struct amdgpu_device *adev,
> -                                       struct amdgpu_iv_entry *entry)
> -{
> -       u8 me_id, pipe_id, queue_id;
> -       struct amdgpu_ring *ring;
> -       int i;
> -
> -       me_id = (entry->ring_id & 0x0c) >> 2;
> -       pipe_id = (entry->ring_id & 0x03) >> 0;
> -       queue_id = (entry->ring_id & 0x70) >> 4;
> -
> -       if (!adev->gfx.disable_kq) {
> -               switch (me_id) {
> -               case 0:
> -                       for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
> -                               ring = &adev->gfx.gfx_ring[i];
> -                               if (ring->me == me_id && ring->pipe == pipe_id &&
> -                                   ring->queue == queue_id)
> -                                       drm_sched_fault(&ring->sched);
> -                       }
> -                       break;
> -               case 1:
> -               case 2:
> -                       for (i = 0; i < adev->gfx.num_compute_rings; i++) {
> -                               ring = &adev->gfx.compute_ring[i];
> -                               if (ring->me == me_id && ring->pipe == pipe_id &&
> -                                   ring->queue == queue_id)
> -                                       drm_sched_fault(&ring->sched);
> -                       }
> -                       break;
> -               default:
> -                       BUG();
> -                       break;
> -               }
> -       }
> -}
> -
>  static int gfx_v11_0_priv_reg_irq(struct amdgpu_device *adev,
>                                   struct amdgpu_irq_src *source,
>                                   struct amdgpu_iv_entry *entry)
>  {
>         DRM_ERROR("Illegal register access in command stream\n");
> -       gfx_v11_0_handle_priv_fault(adev, entry);
> +       amdgpu_gfx_handle_priv_fault(adev, entry);
>         return 0;
>  }
> 
> @@ -6735,7 +6698,7 @@ static int gfx_v11_0_bad_op_irq(struct amdgpu_device *adev,
>                                 struct amdgpu_iv_entry *entry)
>  {
>         DRM_ERROR("Illegal opcode in command stream\n");
> -       gfx_v11_0_handle_priv_fault(adev, entry);
> +       amdgpu_gfx_handle_priv_fault(adev, entry);
>         return 0;
>  }
> 
> @@ -6744,7 +6707,7 @@ static int gfx_v11_0_priv_inst_irq(struct amdgpu_device *adev,
>                                    struct amdgpu_iv_entry *entry)
>  {
>         DRM_ERROR("Illegal instruction in command stream\n");
> -       gfx_v11_0_handle_priv_fault(adev, entry);
> +       amdgpu_gfx_handle_priv_fault(adev, entry);
>         return 0;
>  }
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> index 6baac533a..883878e23 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
> @@ -5015,49 +5015,12 @@ static int gfx_v12_0_set_priv_inst_fault_state(struct amdgpu_device *adev,
>         return 0;
>  }
> 
> -static void gfx_v12_0_handle_priv_fault(struct amdgpu_device *adev,
> -                                       struct amdgpu_iv_entry *entry)
> -{
> -       u8 me_id, pipe_id, queue_id;
> -       struct amdgpu_ring *ring;
> -       int i;
> -
> -       me_id = (entry->ring_id & 0x0c) >> 2;
> -       pipe_id = (entry->ring_id & 0x03) >> 0;
> -       queue_id = (entry->ring_id & 0x70) >> 4;
> -
> -       if (!adev->gfx.disable_kq) {
> -               switch (me_id) {
> -               case 0:
> -                       for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
> -                               ring = &adev->gfx.gfx_ring[i];
> -                               if (ring->me == me_id && ring->pipe == pipe_id &&
> -                                   ring->queue == queue_id)
> -                                       drm_sched_fault(&ring->sched);
> -                       }
> -                       break;
> -               case 1:
> -               case 2:
> -                       for (i = 0; i < adev->gfx.num_compute_rings; i++) {
> -                               ring = &adev->gfx.compute_ring[i];
> -                               if (ring->me == me_id && ring->pipe == pipe_id &&
> -                                   ring->queue == queue_id)
> -                                       drm_sched_fault(&ring->sched);
> -                       }
> -                       break;
> -               default:
> -                       BUG();
> -                       break;
> -               }
> -       }
> -}
> -
>  static int gfx_v12_0_priv_reg_irq(struct amdgpu_device *adev,
>                                   struct amdgpu_irq_src *source,
>                                   struct amdgpu_iv_entry *entry)
>  {
>         DRM_ERROR("Illegal register access in command stream\n");
> -       gfx_v12_0_handle_priv_fault(adev, entry);
> +       amdgpu_gfx_handle_priv_fault(adev, entry);
>         return 0;
>  }
> 
> @@ -5066,7 +5029,7 @@ static int gfx_v12_0_bad_op_irq(struct amdgpu_device *adev,
>                                 struct amdgpu_iv_entry *entry)
>  {
>         DRM_ERROR("Illegal opcode in command stream\n");
> -       gfx_v12_0_handle_priv_fault(adev, entry);
> +       amdgpu_gfx_handle_priv_fault(adev, entry);
>         return 0;
>  }
> 
> @@ -5075,7 +5038,7 @@ static int gfx_v12_0_priv_inst_irq(struct amdgpu_device *adev,
>                                    struct amdgpu_iv_entry *entry)
>  {
>         DRM_ERROR("Illegal instruction in command stream\n");
> -       gfx_v12_0_handle_priv_fault(adev, entry);
> +       amdgpu_gfx_handle_priv_fault(adev, entry);
>         return 0;
>  }
> 
> --
> 2.34.1
> 

Claude review: Re: [PATCH] drm/amd/amdgpu: remove duplicated code in gfx_v11 and gfx_v12

[Claude Code Review Bot]

Overall Series Review

Subject: Re: [PATCH] drm/amd/amdgpu: remove duplicated code in gfx_v11 and gfx_v12
Author: =?UTF-8?Q?Christian_K=C3=B6nig?= <christian.koenig@amd.com>
Patches: 2
Reviewed: 2026-05-05T10:53:47.373114

---

This is a single-patch cleanup that consolidates identical `handle_priv_fault` implementations from `gfx_v11_0.c` and `gfx_v12_0.c` into a shared `amdgpu_gfx_handle_priv_fault()` in `amdgpu_gfx.c`. The consolidation is correct — I verified that the two original functions are byte-for-byte identical in the current tree. The mechanical transformation is clean.

However, there are a few issues:

1. **`Co-developed-by` tag ordering is wrong** — kernel documentation requires each `Co-developed-by` to be immediately followed by its corresponding `Signed-off-by`, with the submitter's `Signed-off-by` last.
2. **`BUG()` in the default case** — this is inherited from the original code, but consolidating into shared infrastructure is a good opportunity to fix it. `BUG()` in an interrupt handler will panic the kernel. The newer `gfx_v12_1` already uses `dev_dbg()` for this case instead.
3. **Incomplete consolidation** — `gfx_v10_0.c` has a nearly identical implementation (differing only in lacking the `disable_kq` guard), and `gfx_v12_1.c` has a related variant. At minimum, the commit message should acknowledge why these were excluded.
4. **Minor style issues** in the kernel-doc comment.

Verdict: Good idea, needs a v2 to fix the tag ordering and ideally address the `BUG()` concern.

---

---
Generated by Claude Code Patch Reviewer

Claude review: Re: [PATCH] drm/amd/amdgpu: remove duplicated code in gfx_v11 and gfx_v12

[Claude Code Review Bot]

Patch Review

**Tag ordering (must fix):**

The current trailer block is:

```
Signed-off-by: Ulisses Paixao <ulissespaixao@usp.br>
Co-developed-by: Felipe Sousa <felipesousa@usp.br>
Signed-off-by: Felipe Sousa <felipesousa@usp.br>
```

Per [Documentation/process/submitting-patches.rst](https://www.kernel.org/doc/html/latest/process/submitting-patches.html#when-to-use-acked-by-cc-and-co-developed-by), every `Co-developed-by:` must be immediately followed by the corresponding `Signed-off-by:`, and the submitter's `Signed-off-by:` must be last. The correct ordering is:

```
Co-developed-by: Felipe Sousa <felipesousa@usp.br>
Signed-off-by: Felipe Sousa <felipesousa@usp.br>
Signed-off-by: Ulisses Paixao <ulissespaixao@usp.br>
```

**`BUG()` in default case (should fix):**

```c
		default:
			BUG();
			break;
```

This is an interrupt handler context. `BUG()` will panic the kernel, which is disproportionate for receiving an unexpected `me_id` value. The newer `gfx_v12_1_handle_priv_fault` already handles this more gracefully:

```c
		default:
			dev_dbg(adev->dev, "Unexpected me %d in priv_fault\n", me_id);
			break;
```

Since this function is being promoted to shared infrastructure, this is the right time to replace `BUG()` with `WARN_ONCE()` or `dev_err()` — something that logs the problem without crashing the machine.

**Incomplete consolidation (minor, worth mentioning in commit message):**

The tree also has `handle_priv_fault` in:
- `gfx_v10_0.c` — nearly identical, only missing the `!adev->gfx.disable_kq` guard
- `gfx_v12_1.c` — different (has `xcc_id` / multi-XCC logic, no gfx ring case)

The commit message should mention why these aren't included. For `gfx_v10_0`, the `disable_kq` guard is likely just a missing backport — wrapping it in the same shared function (which has the guard) might even be a bugfix. Worth investigating.

**Kernel-doc comment trailing whitespace:**

```c
+ * amdgpu_gfx_handle_priv_fault - Handle privileged instruction fault
+ * 
+ * @adev: amdgpu_device pointer
+ * @entry: interrupt vector entry from the hardware
+ * 
```

Lines 3 and 5 of the doc comment (the blank lines marked with ` * `) have trailing whitespace after the `*`. These should be just ` *` with no trailing space. Some CI checks flag this.

**Code correctness:**

The consolidated function itself is a faithful copy of the originals. The extraction into `amdgpu_gfx.c` is placed logically after `amdgpu_gfx_enable_kgq()` near other queue-management code. The declaration in `amdgpu_gfx.h` is placed alphabetically near related functions. The callers in both `gfx_v11_0.c` and `gfx_v12_0.c` are updated correctly across all three IRQ handlers (`priv_reg_irq`, `bad_op_irq`, `priv_inst_irq`).

No functional change for v11 and v12 — this is a clean refactor.

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Generated by Claude Code Patch Reviewer