Claude review: Add support for Adreno 810 GPU

[Claude Code Review Bot <claude-review@example.com>]

Overall Series Review

Subject: Add support for Adreno 810 GPU
Author: Alexander Koskovich <akoskovich@pm.me>
Patches: 9
Reviewed: 2026-04-12T13:17:00.559830

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This 7-patch RFC series adds support for the Adreno 810 GPU (chip ID 0x44010000) found in Qualcomm SM7635 (Milos). The series is well-structured: patches 1-2 add DT bindings, patches 3-4 refactor cx_misc_mmio handling to decouple it from LLCC (needed because Milos has no LLCC), patch 5 fixes the pipe protect slot addressing to accommodate A810's different protect count_max, patch 6 adds the main catalog entry, and patch 7 adds the DTS nodes.

The series is logically ordered and the prerequisite patches (3-5) are correctly sequenced before the GPU support patch (6). The RFC status is appropriate given the external dependencies on GX GDSC and GXCLKCTL series.

**One significant concern:** Patch 5 changes the meaning of `count_max` for A8xx GPUs. Before patch 5, `count_max` was used as the pipe protect slot index (always 15). After patch 5, it's no longer used for the pipe slot. The A810 entry then sets `count_max = 64` (the global protect slot maximum), which is semantically different from the existing x285/a840 `count_max = 15`. The x285 and a840 entries should probably be updated to `count_max = 64` as well for consistency, and their BUILD_BUG_ON checks should be added to `__build_asserts`.

Overall the series looks reasonable for an RFC. A few minor points noted per-patch below.

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Generated by Claude Code Patch Reviewer