Claude review: drm/rcar-du: Add support for DSI pipelines with DSC

[Claude Code Review Bot <claude-review@example.com>]

Overall Series Review

Subject: drm/rcar-du: Add support for DSI pipelines with DSC
Author: Tomi Valkeinen <tomi.valkeinen+renesas@ideasonboard.com>
Patches: 8
Reviewed: 2026-05-16T09:29:57.304158

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This is a well-structured 7-patch series adding DSC (Display Stream Compression) bypass-mode support for Renesas R-Car V4H SoCs. The DSC IP block sits between the DU and DSI1, and even when DSC encoding is not used, the block must be powered for DSI1 output to function. The series correctly adds: clock definition, DT binding, bridge driver, DSI pipeline adaptation, SoC DT node, and board-level enablement for Sparrow Hawk and White Hawk.

The overall design is sound — a simple drm_bridge pass-through driver that powers the DSC block on/off via runtime PM. The pipeline re-wiring in the DT and the `rcar_mipi_dsi_resolve_bridge()` helper in the DSI driver are appropriate solutions for the architecture.

There are a few issues to address, primarily around resource lifetime in the DSC driver (bridge reference leak, manual PM runtime management), and the `mode_valid` clock check semantics.

**Verdict**: Mostly ready. The bridge reference leak should be fixed before merge; the other items are minor.

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