Claude review: drm/dp: Define DSC bpp delta DPCD fields

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

This patch moves the existing `DP_DSC_RGB_YCbCr444_MAX_BPP_DELTA_MASK` and `DP_DSC_RGB_YCbCr420_MAX_BPP_DELTA_MASK` definitions from under `DP_DSC_BITS_PER_PIXEL_INC (0x06F)` to the correct register `DP_DSC_MAX_BPP_DELTA (0x06E)`, and adds three new constants. The register reassociation is correct per the DP spec, but the new constants have problems.

**Naming convention violation.** All DPCD field definitions in this header use the `DP_DSC_` prefix. The three new defines break this convention:

```c
+#define MIN_DSC_BPP_DELTA_444 16
+#define MIN_DSC_BPP_DELTA_420 12
+#define BPP_DELTA_SHIFT_420 5
```

These should be `DP_DSC_MIN_BPP_DELTA_444`, `DP_DSC_MIN_BPP_DELTA_420`, and `DP_DSC_BPP_DELTA_SHIFT_420` at minimum. The unprefixed names risk collisions in the global namespace.

**Placement concern.** `MIN_DSC_BPP_DELTA_444`, `MIN_DSC_BPP_DELTA_420`, and `BPP_DELTA_SHIFT_420` are not DPCD register or field definitions — they're decode helper constants used only by the i915 driver in patch 2. They don't belong in `include/drm/display/drm_dp.h`, which is a shared header for DPCD register definitions. Either move them to the i915 driver code, or if they are truly spec-mandated values, add a comment referencing the relevant spec section/table.

**`BPP_DELTA_SHIFT_420` is redundant.** The shift value 5 is trivially derivable from `DP_DSC_RGB_YCbCr420_MAX_BPP_DELTA_MASK (0xe0)` using `__ffs()` or by simply writing `>> 5` at the call site. If you do keep it, the name should reference it's a shift for the mask, e.g., `DP_DSC_RGB_YCbCr420_MAX_BPP_DELTA_SHIFT`.

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