From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: drm/i915/dp: Decode DSC max delta bpp from sink DPCD
Date: Thu, 23 Apr 2026 10:06:55 +1000 [thread overview]
Message-ID: <review-patch2-20260420112611.1481530-3-nemesa.garg@intel.com> (raw)
In-Reply-To: <20260420112611.1481530-3-nemesa.garg@intel.com>
Patch Review
This adds `intel_dp_dsc_max_delta_bppx16()` and inserts it as a new fallback level in `intel_dp_dsc_max_sink_compressed_bppx16()` between the eDP absolute DPCD value and the spec-table defaults.
**Bug: Reserved 444 delta values produce wrong output.** The 444 mask (`0x1f`) yields a 5-bit field with range 0–31. The valid range check only covers 1–21:
```c
max_bpp_delta = dsc_dpcd[DP_DSC_MAX_BPP_DELTA - DP_DSC_SUPPORT] &
DP_DSC_RGB_YCbCr444_MAX_BPP_DELTA_MASK;
if (max_bpp_delta >= 1 && max_bpp_delta <= 21)
max_bpp_delta = max_bpp_delta + MIN_DSC_BPP_DELTA_444 - 1;
```
If a sink reports a reserved value (22–31), the raw encoded value passes through without decoding, and `max_bpp_delta << 4` returns a nonsensical bppx16 value (e.g., value 25 would give 400, meaning 25 bpp — which is a wrong decode). Reserved values should return 0 (unsupported) to fall through to the bpc-based defaults:
```c
if (max_bpp_delta >= 1 && max_bpp_delta <= 21)
max_bpp_delta = max_bpp_delta + MIN_DSC_BPP_DELTA_444 - 1;
else
max_bpp_delta = 0;
```
The 420 case doesn't have this issue since the 3-bit field (0xe0 >> 5) maxes at 7, and the check `>= 1 && <= 7` covers all non-zero values.
**Misleading function name.** `intel_dp_dsc_max_delta_bppx16` says "delta" but the function returns the *absolute* maximum compressed bpp (in x16 format), not a delta. The delta is an encoding detail internal to the function. Consider `intel_dp_dsc_sink_max_bppx16_from_delta` or similar.
**Variable type.** `max_bpp_delta` is declared as `int` but only holds non-negative values derived from masked byte reads. Using `u8` would be more precise and self-documenting.
**Missing `else` for default case value.** When the `default:` case in the switch is hit, the function does `MISSING_CASE()` and `return 0`, but if neither the RGB/444 nor 420 cases match and `output_format` is some unexpected value, the flow is correct. This is fine.
**Integration logic is correct.** The insertion into `intel_dp_dsc_max_sink_compressed_bppx16` creates a clean three-tier fallback:
1. eDP absolute DPCD (0x067/0x068)
2. Delta-based DPCD (0x06E) — new
3. Spec table defaults based on bpc — existing
This ordering is logical. The duplicated `if (max_bppx16) return max_bppx16;` pattern is slightly repetitive but functionally correct.
---
Generated by Claude Code Patch Reviewer
next prev parent reply other threads:[~2026-04-23 0:06 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-20 11:26 [PATCH 0/2] DSC max delta bpp support Nemesa Garg
2026-04-20 11:26 ` [PATCH 1/2] drm/dp: Define DSC bpp delta DPCD fields Nemesa Garg
2026-04-21 6:34 ` Nautiyal, Ankit K
2026-04-23 0:06 ` Claude review: " Claude Code Review Bot
2026-04-20 11:26 ` [PATCH 2/2] drm/i915/dp: Decode DSC max delta bpp from sink DPCD Nemesa Garg
2026-04-21 10:50 ` Nautiyal, Ankit K
2026-04-23 0:06 ` Claude Code Review Bot [this message]
2026-04-23 0:06 ` Claude review: DSC max delta bpp support Claude Code Review Bot
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