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From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: drm: lcdif: Use dedicated set/clr registers for polarity/edge
Date: Tue, 31 Mar 2026 16:48:35 +1000	[thread overview]
Message-ID: <review-patch2-20260330224619.2620782-3-paulk@sys-base.io> (raw)
In-Reply-To: <20260330224619.2620782-3-paulk@sys-base.io>

Patch Review

**Improvement over the original code, but the commit message undersells it.**

The old code:
```c
writel(ctrl, lcdif->base + LCDC_V8_CTRL);
```
This was a full register write with only polarity bits set, which would **clobber** any other bits previously configured in `LCDC_V8_CTRL` (e.g., `CTRL_NEG`, `CTRL_FETCH_START_OPTION_*`). Using `REG_SET`/`REG_CLR` at offsets +4/+8 is strictly safer because it modifies only the targeted bits via atomic set/clear.

The commit message says "It is unclear if there is a difference" — but there **is** a clear difference: the old code was a plain write that could zero other CTRL bits, while `REG_SET`/`REG_CLR` are read-modify-write at the hardware level. The commit message should mention this as the primary motivation rather than presenting it as cargo-culting the BSP.

No functional issues with the code itself. The `else` branches correctly clear the bits when the condition is false, which the old code did implicitly (by not OR-ing them into a zero-initialized variable and then doing a full write).

---

---
Generated by Claude Code Patch Reviewer

  reply	other threads:[~2026-03-31  6:48 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-30 22:46 [PATCH 0/3] drm: lcdif: FIFO underrun/solid color bug fix Paul Kocialkowski
2026-03-30 22:46 ` [PATCH 1/3] drm: lcdif: Set undocumented bit to clear FIFO at vsync Paul Kocialkowski
2026-03-31  6:48   ` Claude review: " Claude Code Review Bot
2026-03-30 22:46 ` [PATCH 2/3] drm: lcdif: Use dedicated set/clr registers for polarity/edge Paul Kocialkowski
2026-03-31  6:48   ` Claude Code Review Bot [this message]
2026-03-30 22:46 ` [PATCH 3/3] drm: lcdif: Wait for vblank before disabling DMA Paul Kocialkowski
2026-03-31  6:48   ` Claude review: " Claude Code Review Bot
2026-03-31  6:48 ` Claude review: drm: lcdif: FIFO underrun/solid color bug fix Claude Code Review Bot

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