[PATCH 0/2] drm/panel: simple: Add Startek KD070HDFLD092 LVDS panel support

[PATCH 0/2] drm/panel: simple: Add Startek KD070HDFLD092 LVDS panel support

[Stefan Kerkmann]

The Startek KD070HDFLD092 is a 7" WSVGA LVDS panel.

Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
---
Stefan Kerkmann (2):
      dt-bindings: display: simple: Add Startek KD070HDFLD092 panel
      drm/panel: simple: Add Startek KD070HDFLD092 LVDS panel support

 .../bindings/display/panel/panel-simple.yaml       |  2 ++
 drivers/gpu/drm/panel/panel-simple.c               | 29 ++++++++++++++++++++++
 2 files changed, 31 insertions(+)
---
base-commit: bfe62a454542cfad3379f6ef5680b125f41e20f4
change-id: 20260407-panel-simple-startek-upstream-7eddd07166c1

Best regards,
--  
Stefan Kerkmann <s.kerkmann@pengutronix.de>

[PATCH 1/2] dt-bindings: display: simple: Add Startek KD070HDFLD092 panel

[Stefan Kerkmann]

Add Startek KD070HDFLD092 7" WSVGA LVDS panel compatible.

Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
---
 Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
index 868edb04989a5..2a6a41349e5f7 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
+++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
@@ -302,6 +302,8 @@ properties:
       - shelly,sca07010-bfn-lnn
         # Starry KR070PE2T 7" WVGA TFT LCD panel
       - starry,kr070pe2t
+        # Startek KD070HDFLD092 7" WSVGA TFT LCD panel
+      - startek,kd070hdfld092
         # Startek KD070WVFPA043-C069A 7" TFT LCD panel
       - startek,kd070wvfpa
         # Team Source Display Technology TST043015CMHX 4.3" WQVGA TFT LCD panel

-- 
2.47.3

[PATCH 2/2] drm/panel: simple: Add Startek KD070HDFLD092 LVDS panel support

[Stefan Kerkmann]

The Startek KD070HDFLD092 is a 7" WSVGA LVDS panel.

Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
---
 drivers/gpu/drm/panel/panel-simple.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 91ab280869bac..737a1014f8112 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -4540,6 +4540,32 @@ static const struct panel_desc starry_kr070pe2t = {
 	.connector_type = DRM_MODE_CONNECTOR_DPI,
 };
 
+static const struct display_timing startek_kd070hdfld092_timing = {
+	.pixelclock = { 40800000, 51200000, 67200000 },
+	.hactive = { 1024, 1024, 1024 },
+	.hfront_porch = { 40, 160, 216 },
+	.hback_porch = { 30, 140, 140 },
+	.hsync_len = { 20, 20, 20 },
+	.vactive = { 600, 600, 600 },
+	.vfront_porch = { 2, 12, 177 },
+	.vback_porch = { 5, 20, 20 },
+	.vsync_len = { 3, 3, 3 },
+	.flags = DISPLAY_FLAGS_DE_HIGH,
+};
+
+static const struct panel_desc startek_kd070hdfld092 = {
+	.timings = &startek_kd070hdfld092_timing,
+	.num_timings = 1,
+	.bpc = 8,
+	.size = {
+		.width = 154,
+		.height = 86,
+	},
+	.bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
+	.bus_flags = DRM_BUS_FLAG_DE_HIGH,
+	.connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
 static const struct display_timing startek_kd070wvfpa_mode = {
 	.pixelclock = { 25200000, 27200000, 30500000 },
 	.hactive = { 800, 800, 800 },
@@ -5532,6 +5558,9 @@ static const struct of_device_id platform_of_match[] = {
 	}, {
 		.compatible = "starry,kr070pe2t",
 		.data = &starry_kr070pe2t,
+	}, {
+		.compatible = "startek,kd070hdfld092",
+		.data = &startek_kd070hdfld092,
 	}, {
 		.compatible = "startek,kd070wvfpa",
 		.data = &startek_kd070wvfpa,

-- 
2.47.3

Re: [PATCH 1/2] dt-bindings: display: simple: Add Startek KD070HDFLD092 panel

[Krzysztof Kozlowski]

On Tue, Apr 07, 2026 at 11:31:16AM +0200, Stefan Kerkmann wrote:
> Add Startek KD070HDFLD092 7" WSVGA LVDS panel compatible.
> 
> Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de>
> ---
>  Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
>  1 file changed, 2 insertions(+)

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>

Best regards,
Krzysztof

Claude review: drm/panel: simple: Add Startek KD070HDFLD092 LVDS panel support

[Claude Code Review Bot]

Overall Series Review

Subject: drm/panel: simple: Add Startek KD070HDFLD092 LVDS panel support
Author: Stefan Kerkmann <s.kerkmann@pengutronix.de>
Patches: 4
Reviewed: 2026-04-12T13:43:27.016952

---

This is a clean, straightforward 2-patch series adding support for the Startek KD070HDFLD092 7" WSVGA (1024x600) LVDS panel to the `panel-simple` driver. The patches follow the established conventions for panel-simple additions: patch 1 adds the dt-binding compatible string, patch 2 adds the driver support.

The timing values are internally consistent for a 60 Hz panel (typical: 51.2 MHz / (1344 * 635) ~= 60 Hz), the physical dimensions (154 mm x 86 mm, diagonal ~176 mm / 6.94") are consistent with the "7 inch" designation, and the bus format (`RGB888_1X7X4_SPWG` with `bpc = 8`) is the correct SPWG LVDS encoding matching the existing validation logic in `panel_simple_probe()`. No issues found.

**Verdict: Series looks good to merge.**

---

---
Generated by Claude Code Patch Reviewer

Claude review: dt-bindings: display: simple: Add Startek KD070HDFLD092 panel

[Claude Code Review Bot]

Patch Review

**Status: Good**

This adds the compatible string `startek,kd070hdfld092` to `panel-simple.yaml`.

The entry is inserted between `starry,kr070pe2t` and `startek,kd070wvfpa`, maintaining correct alphabetical order. The indentation (8-space comment, 6-space `- compatible`) matches the surrounding entries in the existing file at lines 307-310.

The comment describes it as a `7" WSVGA TFT LCD panel`, which matches the resolution (1024x600 = WSVGA).

No issues.

---

---
Generated by Claude Code Patch Reviewer

Claude review: drm/panel: simple: Add Startek KD070HDFLD092 LVDS panel support

[Claude Code Review Bot]

Patch Review

**Status: Good**

This adds the `display_timing` and `panel_desc` structures plus the `of_device_id` entry.

**Timing validation:**

```c
static const struct display_timing startek_kd070hdfld092_timing = {
	.pixelclock = { 40800000, 51200000, 67200000 },
	.hactive = { 1024, 1024, 1024 },
	.hfront_porch = { 40, 160, 216 },
	.hback_porch = { 30, 140, 140 },
	.hsync_len = { 20, 20, 20 },
	.vactive = { 600, 600, 600 },
	.vfront_porch = { 2, 12, 177 },
	.vback_porch = { 5, 20, 20 },
	.vsync_len = { 3, 3, 3 },
	.flags = DISPLAY_FLAGS_DE_HIGH,
};
```

- Typical totals: H = 1024+160+140+20 = 1344, V = 600+12+20+3 = 635. At 51.2 MHz: 51200000/(1344*635) = ~60 Hz. Correct.
- Min totals: H = 1114, V = 610. At 40.8 MHz: 40800000/(1114*610) = ~60 Hz. Consistent.
- Max totals: H = 1400, V = 800. At 67.2 MHz: 67200000/(1400*800) = 60 Hz. Consistent.
- All three corners converge on 60 Hz, which is expected.

**Panel descriptor:**

```c
static const struct panel_desc startek_kd070hdfld092 = {
	.timings = &startek_kd070hdfld092_timing,
	.num_timings = 1,
	.bpc = 8,
	.size = {
		.width = 154,
		.height = 86,
	},
	.bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
	.bus_flags = DRM_BUS_FLAG_DE_HIGH,
	.connector_type = DRM_MODE_CONNECTOR_LVDS,
};
```

- `bpc = 8` with `MEDIA_BUS_FMT_RGB888_1X7X4_SPWG` is correct and will pass the validation check at `panel-simple.c:644`.
- `DRM_BUS_FLAG_DE_HIGH` is consistent with the timing `DISPLAY_FLAGS_DE_HIGH`.
- `DRM_MODE_CONNECTOR_LVDS` is correct for an LVDS panel.
- No power-on delays are specified, which is fine -- many LVDS panels in this driver omit them (e.g. the AUO panels around line 814).
- Physical dimensions (154x86 mm) yield a diagonal of ~176 mm / 6.94", confirming the 7" specification.

**of_device_id table:** The new entry is inserted in correct alphabetical order between `starry,kr070pe2t` and `startek,kd070wvfpa`.

No issues.

---
Generated by Claude Code Patch Reviewer