Claude review: dt-bindings: arm-smmu: Update the description for Glymur GPU SMMU

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

**Status: Minor observations.**

This patch does two things:

1. Adds an `interconnects` property to the common SMMU properties:

```
+  interconnects:
+    maxItems: 1
```

2. Extends the SM8750-specific compatible section to also cover Glymur:

```
-            - const: qcom,sm8750-smmu-500
+            - enum:
+                - qcom,glymur-smmu-500
+                - qcom,sm8750-smmu-500
```

**Observations:**

- The `interconnects` addition at the top-level of the SMMU schema is a global change — it allows `interconnects` for *all* ARM SMMU variants, not just the Glymur one. Looking at the existing kernel tree, no current `adreno_smmu` node (sm8550, sm8650) uses `interconnects`. This is presumably a new requirement for Glymur. The DT binding maintainers may want to confirm whether this should be constrained to specific compatible strings rather than being globally allowed. That said, `maxItems: 1` is reasonable and the property is well-understood in the DT ecosystem.

- The sm8750 section reuse is sensible since Glymur and SM8750 share the same GPU SMMU clock configuration (single "hlos" clock).

---

---
Generated by Claude Code Patch Reviewer