Claude review: drm/rockchip: vop2: Wait for layer cfg done before switching LAYERSEL_REGDONE_SEL

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

**Verdict: Good fix, correct.**

This patch reorders the operations so that:
1. **First**: wait for the previous VP's layer config to latch (the wait needs the old VP's vsync to fire)
2. **Then**: write RK3568_OVL_CTRL with LAYERSEL_REGDONE_SEL set to the current VP
3. **Then**: handle port_sel changes

Before this patch, LAYERSEL_REGDONE_SEL was switched to the current VP *before* the wait, meaning the previous VP's vsync could no longer trigger the shadow register latch — a classic ordering bug.

The moved block:
```c
if (layer_sel != old_layer_sel || port_sel != old_port_sel)
    ovl_ctrl |= FIELD_PREP(RK3568_OVL_CTRL__LAYERSEL_REGDONE_SEL, vp->id);
vop2_writel(vop2, RK3568_OVL_CTRL, ovl_ctrl);

if (port_sel != old_port_sel) {
    vop2_writel(vop2, RK3568_OVL_PORT_SEL, port_sel);
    vop2_cfg_done(vp);
    rk3568_vop2_wait_for_port_mux_done(vop2);
}
```

now appears *after* the layer cfg done wait, which is correct.

Note: the `vop2_writel(vop2, RK3568_OVL_CTRL, ovl_ctrl)` is unconditional (always writes ovl_ctrl even when LAYERSEL_REGDONE_SEL is not set). This was the same before the patch so it's not a regression — but it means we always write OVL_CTRL even in the no-change case. Not a bug, just an observation about pre-existing behavior.

No issues.

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Generated by Claude Code Patch Reviewer