Claude review: drm/msm/a6xx: Append SEL regs to dyn pwrup reglist

[Claude Code Review Bot <claude-review@example.com>]

Patch Review

The `perfcntr_select` helper writes to both the ringbuffer and the pwrup reglist simultaneously. The reglist overflow check is a good safety guard:
```c
WARN_ON_ONCE(reglist > (uint32_t *)((uint8_t *)lock + PWRUP_REGLIST_SIZE));
```

The change from fixed `uint64_t regs[62]` to flexible `uint64_t regs[]` in `cpu_gpu_lock` is necessary to accommodate the larger reglist.

The reasoning about skipping the spinlock dance with SQE is sound: if SQE reads the old (shorter) dynamic_list_len, it restores fewer regs. Then the ringbuffer programming corrects the SEL regs before any sampling begins.

The barrier sequencing is correct:
1. Clear `dynamic_list_len` to remove old SEL entries
2. `dma_wmb()` -- GPU sees shorter list before we modify the data
3. Write new SEL entries
4. `dma_wmb()` -- GPU sees new data before longer length
5. Update `dynamic_list_len` to include new SEL entries

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Generated by Claude Code Patch Reviewer