[PATCH 0/2] Add NEC LCD Technologies NL6448BC33-70C Panel Support

[PATCH 0/2] Add NEC LCD Technologies NL6448BC33-70C Panel Support

[Steffen Trumtrar]

Add support for the above mentioned LCD panel from NEC.

---
Steffen Trumtrar (2):
      dt-bindings: display: simple: Add NEC NL6448BC33-70C panel
      drm/panel: simple: add NEC NL6448BC33-70C

 .../bindings/display/panel/panel-simple.yaml       |  2 ++
 drivers/gpu/drm/panel/panel-simple.c               | 28 ++++++++++++++++++++++
 2 files changed, 30 insertions(+)
---
base-commit: 254f49634ee16a731174d2ae34bc50bd5f45e731
change-id: 20260513-v7-1-topic-panel-simple-nl6448bc33-c36e33b18ab1

Best regards,
--  
Steffen Trumtrar <s.trumtrar@pengutronix.de>

[PATCH 1/2] dt-bindings: display: simple: Add NEC NL6448BC33-70C panel

[Steffen Trumtrar]

Add the NEC LCD Technologies,Ltd. NL6448BC33-70C 10.4" 640x480 LCD panel.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 Documentation/devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
index 3e41ed0ef5d51..96d218f78b0be 100644
--- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
+++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml
@@ -232,6 +232,8 @@ properties:
       - nec,nl12880bc20-05
         # NEC LCD Technologies,Ltd. WQVGA TFT LCD panel
       - nec,nl4827hc19-05b
+        # NEC LCD Technologies,Ltd. VGA TFT LCD panel
+      - nec,nl6448bc33-70c
         # Netron-DY E231732 7.0" WSVGA TFT LCD panel
       - netron-dy,e231732
         # Newhaven Display International 480 x 272 TFT LCD panel

-- 
2.53.0

Claude review: dt-bindings: display: simple: Add NEC NL6448BC33-70C panel

[Claude Code Review Bot]

Patch Review

This patch adds the compatible string `nec,nl6448bc33-70c` to the panel-simple bindings YAML.

**No issues found.** The entry is correctly placed in alphabetical order after `nec,nl4827hc19-05b` and before `netron-dy,e231732`. The comment "NEC LCD Technologies,Ltd. VGA TFT LCD panel" is accurate for a 640x480 panel.

---
Generated by Claude Code Patch Reviewer

[PATCH 2/2] drm/panel: simple: add NEC NL6448BC33-70C

[Steffen Trumtrar]

Add NEC NL6448BC33-70C 10.4" 640x480 LCD module support.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 drivers/gpu/drm/panel/panel-simple.c | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 236bd56208ccf..bbbbdd399d1c3 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -3659,6 +3659,31 @@ static const struct panel_desc nec_nl4827hc19_05b = {
 	.bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
 };
 
+static const struct drm_display_mode nec_nl6448bc33_70c_mode = {
+	.clock = 25175,
+	.hdisplay = 640,
+	.hsync_start = 640 + 16,
+	.hsync_end = 640 + 16 + 48,
+	.htotal = 640 + 16 + 48 + 96,
+	.vdisplay = 480,
+	.vsync_start = 480 + 2,
+	.vsync_end = 480 + 2 + 31,
+	.vtotal = 480 + 2 + 31 + 31,
+	.flags = DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PHSYNC,
+};
+
+static const struct panel_desc nec_nl6448bc33_70c = {
+	.modes = &nec_nl6448bc33_70c_mode,
+	.num_modes = 1,
+	.bpc = 6,
+	.size = {
+		.width = 243,
+		.height = 185,
+	},
+	.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
+	.bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
+};
+
 static const struct drm_display_mode netron_dy_e231732_mode = {
 	.clock = 66000,
 	.hdisplay = 1024,
@@ -5520,6 +5545,9 @@ static const struct of_device_id platform_of_match[] = {
 	}, {
 		.compatible = "nec,nl4827hc19-05b",
 		.data = &nec_nl4827hc19_05b,
+	}, {
+		.compatible = "nec,nl6448bc33-70c",
+		.data = &nec_nl6448bc33_70c,
 	}, {
 		.compatible = "netron-dy,e231732",
 		.data = &netron_dy_e231732,

-- 
2.53.0

Claude review: drm/panel: simple: add NEC NL6448BC33-70C

[Claude Code Review Bot]

Patch Review

This patch adds the mode definition, panel descriptor, and OF match table entry.

**Issue 1 (likely bug): Physical size uses module outline dimensions, not active area.**

The `panel_desc` struct documents `size.width` and `size.height` as "Width/Height (in mm) of the **active display area**" (panel-simple.c lines 79-86). The patch uses:

```c
.size = {
    .width = 243,
    .height = 185,
},
```

These values (243 x 185 mm) correspond to the **module outline dimensions** of the NL6448BC33-70C, not the active display area. The active area for this panel is 211.2 x 158.4 mm. Using the outline dimensions inflates the reported physical size, leading to incorrect DPI calculations (and undersized rendering on any compositor that uses this information). This should be:

```c
.size = {
    .width = 211,
    .height = 158,
},
```

**Item 2 (worth verifying): Vertical sync pulse width of 31 lines is unusual.**

```c
.vsync_start = 480 + 2,
.vsync_end = 480 + 2 + 31,
.vtotal = 480 + 2 + 31 + 31,
```

This gives VFP=2, VSW=31, VBP=31, vtotal=544. The NL6448BC33 family datasheets I'm aware of typically specify VSW=2 (not 31), VFP=10, VBP=33, for vtotal=525 and ~60 Hz refresh. With vtotal=544, the refresh rate works out to approximately 57.8 Hz (25175000 / (800 * 544)). The submitter should confirm these vertical timing values against the actual -70C variant datasheet. A 31-line sync pulse is very atypical for this class of panel.

**Item 3 (minor, worth confirming): Sync polarity.**

```c
.flags = DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PHSYNC,
```

Standard 640x480@60Hz VGA uses negative sync (NVSYNC | NHSYNC). Some NL6448BC33 variants accept either polarity, so positive may be valid for the -70C, but the submitter should confirm this matches the datasheet.

**Everything else looks correct:**
- The pixel clock of 25175 kHz matches the standard VGA dot clock.
- Horizontal timings (HFP=16, HSW=48, HBP=96, htotal=800) match standard VGA horizontal timing.
- `bpc = 6` with `bus_format = MEDIA_BUS_FMT_RGB666_1X18` is consistent (6 bits x 3 channels = 18 bits).
- `bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE` follows the same pattern as the existing `nec_nl4827hc19_05b` entry.
- The OF match table entry is correctly placed in alphabetical order.

---
Generated by Claude Code Patch Reviewer

Claude review: Add NEC LCD Technologies NL6448BC33-70C Panel Support

[Claude Code Review Bot]

Overall Series Review

Subject: Add NEC LCD Technologies NL6448BC33-70C Panel Support
Author: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Patches: 3
Reviewed: 2026-05-16T11:43:36.601099

---

This is a straightforward 2-patch series adding support for the NEC NL6448BC33-70C 10.4" 640x480 LCD panel to the `panel-simple` driver. The series follows the standard pattern well: patch 1 adds the DT binding compatible string, patch 2 adds the driver entry. The code structure is clean and follows existing conventions in the file. However, there is one likely error in the physical dimensions that should be corrected before merging, and one timing value worth verifying against the datasheet.

---
Generated by Claude Code Patch Reviewer

[PATCH v2 0/2] Add NEC LCD Technologies NL6448BC33-70C Panel Support

[Steffen Trumtrar]

Add support for the above mentioned LCD panel from NEC.

---
Changes in v2:
- fix .size settings
- set connector_type
- Include feedback from Sashiko AI review: https://sashiko.dev/#/patchset/20260513-v7-1-topic-panel-simple-nl6448bc33-v1-0-9bd4b7d0eac0@pengutronix.de?part=2
- Link to v1: https://patch.msgid.link/20260513-v7-1-topic-panel-simple-nl6448bc33-v1-0-9bd4b7d0eac0@pengutronix.de

To: Neil Armstrong <neil.armstrong@linaro.org>
To: Jessica Zhang <jesszhan0024@gmail.com>
To: David Airlie <airlied@gmail.com>
To: Simona Vetter <simona@ffwll.ch>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: Maxime Ripard <mripard@kernel.org>
To: Thomas Zimmermann <tzimmermann@suse.de>
To: Rob Herring <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Thierry Reding <thierry.reding@gmail.com>
To: Sam Ravnborg <sam@ravnborg.org>
Cc: dri-devel@lists.freedesktop.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org

---
Steffen Trumtrar (2):
      dt-bindings: display: simple: Add NEC NL6448BC33-70C panel
      drm/panel: simple: add NEC NL6448BC33-70C

 .../bindings/display/panel/panel-simple.yaml       |  2 ++
 drivers/gpu/drm/panel/panel-simple.c               | 29 ++++++++++++++++++++++
 2 files changed, 31 insertions(+)
---
base-commit: 254f49634ee16a731174d2ae34bc50bd5f45e731
change-id: 20260513-v7-1-topic-panel-simple-nl6448bc33-c36e33b18ab1

Best regards,
--  
Steffen Trumtrar <s.trumtrar@pengutronix.de>

[PATCH v2 2/2] drm/panel: simple: add NEC NL6448BC33-70C

[Steffen Trumtrar]

Add NEC NL6448BC33-70C 10.4" 640x480 LCD module support.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
---
 drivers/gpu/drm/panel/panel-simple.c | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 236bd56208ccf..dca6cbc41bd9f 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -3659,6 +3659,32 @@ static const struct panel_desc nec_nl4827hc19_05b = {
 	.bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
 };
 
+static const struct drm_display_mode nec_nl6448bc33_70c_mode = {
+	.clock = 25175,
+	.hdisplay = 640,
+	.hsync_start = 640 + 16,
+	.hsync_end = 640 + 16 + 48,
+	.htotal = 640 + 16 + 48 + 96,
+	.vdisplay = 480,
+	.vsync_start = 480 + 2,
+	.vsync_end = 480 + 2 + 31,
+	.vtotal = 480 + 2 + 31 + 31,
+	.flags = DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PHSYNC,
+};
+
+static const struct panel_desc nec_nl6448bc33_70c = {
+	.modes = &nec_nl6448bc33_70c_mode,
+	.num_modes = 1,
+	.bpc = 6,
+	.size = {
+		.width = 211,
+		.height = 158,
+	},
+	.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
+	.bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
+	.connector_type = DRM_MODE_CONNECTOR_LVDS,
+};
+
 static const struct drm_display_mode netron_dy_e231732_mode = {
 	.clock = 66000,
 	.hdisplay = 1024,
@@ -5520,6 +5546,9 @@ static const struct of_device_id platform_of_match[] = {
 	}, {
 		.compatible = "nec,nl4827hc19-05b",
 		.data = &nec_nl4827hc19_05b,
+	}, {
+		.compatible = "nec,nl6448bc33-70c",
+		.data = &nec_nl6448bc33_70c,
 	}, {
 		.compatible = "netron-dy,e231732",
 		.data = &netron_dy_e231732,

-- 
2.53.0

Claude review: drm/panel: simple: add NEC NL6448BC33-70C

[Claude Code Review Bot]

Patch Review

**Status: One question on timing values.**

The `panel_desc` structure is well-formed and follows conventions:

```c
static const struct panel_desc nec_nl6448bc33_70c = {
	.modes = &nec_nl6448bc33_70c_mode,
	.num_modes = 1,
	.bpc = 6,
	.size = {
		.width = 211,
		.height = 158,
	},
	.bus_format = MEDIA_BUS_FMT_RGB666_1X18,
	.bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
	.connector_type = DRM_MODE_CONNECTOR_LVDS,
};
```

- `.bpc = 6` with `MEDIA_BUS_FMT_RGB666_1X18` — consistent (6 bits × 3 channels = 18 bits).
- `.connector_type = DRM_MODE_CONNECTOR_LVDS` — correctly set (the neighboring `nec_nl4827hc19_05b` omits this and would hit the "Specify missing connector_type" warning at runtime).
- `.size` = 211×158 mm — correct for a 10.4" panel with 4:3 aspect (10.4" × 4/5 ≈ 211 mm, 10.4" × 3/5 ≈ 158 mm).
- OF match table entry is in correct alphabetical position.

**Timing concern:**

```c
static const struct drm_display_mode nec_nl6448bc33_70c_mode = {
	.clock = 25175,
	.hdisplay = 640,
	.hsync_start = 640 + 16,      /* HFP = 16 */
	.hsync_end = 640 + 16 + 48,   /* HSW = 48 */
	.htotal = 640 + 16 + 48 + 96, /* HBP = 96 */
	.vdisplay = 480,
	.vsync_start = 480 + 2,       /* VFP = 2  */
	.vsync_end = 480 + 2 + 31,    /* VSW = 31 */
	.vtotal = 480 + 2 + 31 + 31,  /* VBP = 31 */
	.flags = DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_PHSYNC,
};
```

The htotal (800) is standard for 640×480, but:

1. **HSW and HBP appear swapped vs. standard VGA** — standard 640×480@60 has HSW=96 and HBP=48, i.e. the reverse of what's here. If these values come from the datasheet they may be correct, but it's worth double-checking.

2. **vtotal = 544 instead of 525** — this yields a refresh rate of 25175000 / (800 × 544) ≈ **57.85 Hz**, which is below the typical 59.94 Hz. The vertical sync width of 31 lines and back porch of 31 lines are quite different from standard VGA (VSW=2, VBP=33). Again, this may be correct per the panel's specifications, but the submitter should confirm these are from the NL6448BC33-70C datasheet and not a transcription error.

Everything else — code structure, naming, placement — looks correct and ready to merge pending timing confirmation.

---
Generated by Claude Code Patch Reviewer