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From: Claude Code Review Bot <claude-review@example.com>
To: dri-devel-reviews@example.com
Subject: Claude review: drm/bridge: tc358762: Improve LCDCTRL defines
Date: Sat, 16 May 2026 12:04:21 +1000	[thread overview]
Message-ID: <review-patch3-20260513-tc358762-fixes-v3-3-6698b55008b9@ideasonboard.com> (raw)
In-Reply-To: <20260513-tc358762-fixes-v3-3-6698b55008b9@ideasonboard.com>

Patch Review

This is the most important cleanup patch. The old LCDCTRL defines were significantly wrong:

- Old `LCDCTRL_VTGEN BIT(4)` → New `LCDCTRL_VTGEN BIT(1)` (the old "VTGEN" was actually part of the pixel format field)
- Old `LCDCTRL_UNK6 BIT(6)` → part of `LCDCTRL_PXLFORM GENMASK(6,4)` 
- Old `LCDCTRL_RGB888 BIT(8)` → New `LCDCTRL_DPI_EN BIT(8)`
- Old `LCDCTRL_VSDELAY(v) (v<<20)` → New `LCDCTRL_DCLK_POL BIT(20)`

The commit message clearly explains the mapping. I verified: old value `LCDCTRL_VSDELAY(1)|LCDCTRL_RGB888|LCDCTRL_UNK6|LCDCTRL_VTGEN` = `BIT(20)|BIT(8)|BIT(6)|BIT(4)` = 0x100150, new value `FIELD_PREP(GENMASK(6,4),5)|LCDCTRL_DPI_EN|LCDCTRL_DCLK_POL` = `0x50|0x100|0x100000` = 0x100150. Matches perfectly.

Also correctly removes the "based on guesswork" comment, suggesting Tomi has verified these against actual documentation. The polarity defines are renamed from `HSPOL`/`DEPOL`/`VSPOL` to `HSYNC_POL`/`DE_POL`/`VSYNC_POL` for clarity.

No issues. **Reviewed-by worthy.**

---
Generated by Claude Code Patch Reviewer

  reply	other threads:[~2026-05-16  2:04 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-13 13:10 [PATCH v3 00/13] drm/bridge: tc358762: Various small fixes Tomi Valkeinen
2026-05-13 13:10 ` [PATCH v3 01/13] drm/bridge: tc358762: Clean up register defines Tomi Valkeinen
2026-05-16  2:04   ` Claude review: " Claude Code Review Bot
2026-05-13 13:10 ` [PATCH v3 02/13] drm/bridge: tc358762: Improve SYSCTRL " Tomi Valkeinen
2026-05-16  2:04   ` Claude review: " Claude Code Review Bot
2026-05-13 13:10 ` [PATCH v3 03/13] drm/bridge: tc358762: Improve LCDCTRL defines Tomi Valkeinen
2026-05-16  2:04   ` Claude Code Review Bot [this message]
2026-05-13 13:10 ` [PATCH v3 04/13] drm/bridge: tc358762: Configure SYSCTRL first Tomi Valkeinen
2026-05-16  2:04   ` Claude review: " Claude Code Review Bot
2026-05-13 13:10 ` [PATCH v3 05/13] drm/bridge: tc358762: Drop SPICMR write Tomi Valkeinen
2026-05-16  2:04   ` Claude review: " Claude Code Review Bot
2026-05-13 13:10 ` [PATCH v3 06/13] drm/bridge: tc358762: Improve DPI enable handling Tomi Valkeinen
2026-05-16  2:04   ` Claude review: " Claude Code Review Bot
2026-05-13 13:10 ` [PATCH v3 07/13] drm/bridge: tc358762: Update comment about the number of lanes Tomi Valkeinen
2026-05-16  2:04   ` Claude review: " Claude Code Review Bot
2026-05-13 13:10 ` [PATCH v3 08/13] drm/bridge: tc358762: Support VTG Tomi Valkeinen
2026-05-16  2:04   ` Claude review: " Claude Code Review Bot
2026-05-13 13:10 ` [PATCH v3 09/13] drm/bridge: tc358762: Fix sync polarities Tomi Valkeinen
2026-05-16  2:04   ` Claude review: " Claude Code Review Bot
2026-05-13 13:10 ` [PATCH v3 10/13] drm/bridge: tc358762: Move tc358762_init() into tc358762_enable() Tomi Valkeinen
2026-05-16  2:04   ` Claude review: " Claude Code Review Bot
2026-05-13 13:10 ` [PATCH v3 11/13] drm/bridge: tc358762: Drop drm_bridge_funcs.mode_set Tomi Valkeinen
2026-05-16  2:04   ` Claude review: " Claude Code Review Bot
2026-05-13 13:10 ` [PATCH v3 12/13] drm/bridge: tc358762: Set DE_POL and DCLK_POL properly Tomi Valkeinen
2026-05-16  2:04   ` Claude review: " Claude Code Review Bot
2026-05-13 13:10 ` [PATCH v3 13/13] drm/panel-simple: Fix powertip,ph800480t013-idf02 timings Tomi Valkeinen
2026-05-16  2:04   ` Claude review: " Claude Code Review Bot
2026-05-16  2:04 ` Claude review: drm/bridge: tc358762: Various small fixes Claude Code Review Bot

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